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PIC18F242 bảng dữ liệu(PDF) 175 Page - Microchip Technology

tên linh kiện PIC18F242
Giải thích chi tiết về linh kiện  High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D
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PIC18F242 bảng dữ liệu(HTML) 175 Page - Microchip Technology

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© 2006 Microchip Technology Inc.
DS39564C-page 173
PIC18FXX2
FIGURE 16-2:
ASYNCHRONOUS TRANSMISSION
FIGURE 16-3:
ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
TABLE 16-6:
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Word 1
STOP bit
Word 1
Transmit Shift Reg
START bit
bit 0
bit 1
bit 7/8
Write to TXREG
Word 1
BRG Output
(Shift Clock)
RC6/TX/CK (pin)
TXIF bit
(Transmit Buffer
Reg. Empty Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Transmit Shift Reg.
Write to TXREG
BRG Output
(Shift Clock)
RC6/TX/CK (pin)
TXIF bit
(Interrupt Reg. Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Word 1
Word 2
Word 1
Word 2
START bit
STOP bit
START bit
Transmit Shift Reg.
Word 1
Word 2
bit 0
bit 1
bit 7/8
bit 0
Note:
This timing diagram shows two consecutive transmissions.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
All Other
RESETS
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE
TMR0IF
INT0IF
RBIF
0000 000x 0000 000u
PIR1
PSPIF(1)
ADIF
RCIF
TXIF
SSPIF
CCP1IF TMR2IF TMR1IF
0000 0000 0000 0000
PIE1
PSPIE(1)
ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
IPR1
PSPIP(1)
ADIP
RCIP
TXIP
SSPIP CCP1IP TMR2IP TMR1IP 0000 0000 0000 0000
RCSTA
SPEN
RX9
SREN
CREN ADDEN
FERR
OERR
RX9D
0000 -00x 0000 -00x
TXREG
USART Transmit Register
0000 0000 0000 0000
TXSTA
CSRC
TX9
TXEN
SYNC
—
BRGH
TRMT
TX9D
0000 -010 0000 -010
SPBRG
Baud Rate Generator Register
0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as '0'.
Shaded cells are not used for Asynchronous Transmission.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18F2X2 devices; always maintain these bits clear.



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