PIC18F242 datasheet(243/332 Pages) MICROCHIP

tên linh kiện	PIC18F242

Giải thích chi tiết về linh kiện	High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

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DS39564C-page 241

PIC18FXX2

RCALL

Relative Call

Syntax:

[

label ] RCALL

Operands:

-1024

≤ n ≤ 1023

Operation:

(PC) + 2

→ TOS,

(PC) + 2 + 2n

→ PC

Status Affected:

None

Encoding:

1101

1nnn

nnnn

Description:

Subroutine call with a jump up to

1K from the current location. First,

return address (PC+2) is pushed

onto the stack. Then, add the 2’s

complement number ’2n’ to the PC.

Since the PC will have incremented

to fetch the next instruction, the

new address will be PC+2+2n.

This instruction is a two-cycle

instruction.

Words:

Cycles:

Q Cycle Activity:

Decode

Read literal

'n'

Push PC to

stack

Process

Data

Write to PC

operation

Example:

HERE

RCALL Jump

Before Instruction

PC =

Address (HERE)

After Instruction

PC =

Address (Jump)

TOS =

Address (HERE+2)

RESET

Reset

Syntax:

[

label ]

RESET

Operands:

None

Operation:

Reset all registers and flags that

are affected by a MCLR Reset.

Status Affected:

All

Encoding:

0000

1111

Description:

This instruction provides a way to

execute a MCLR Reset in software.

Words:

Cycles:

Q Cycle Activity:

Decode

Start

reset

operation

Example:

RESET

After Instruction

Registers =

Reset Value

Flags*

Reset Value

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