PIC18F242 datasheet(225/332 Pages) MICROCHIP

tên linh kiện	PIC18F242

Giải thích chi tiết về linh kiện	High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

PDF	332 Pages

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nhà sản xuất	MICROCHIP [Microchip Technology]

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DS39564C-page 223

PIC18FXX2

BRA

Unconditional Branch

Syntax:

[

label ] BRA

Operands:

-1024

≤ n ≤ 1023

Operation:

(PC) + 2 + 2n

→ PC

Status Affected:

None

Encoding:

1101

0nnn

nnnn

Description:

Add the 2’s complement number

’2n’ to the PC. Since the PC will

have incremented to fetch the next

instruction, the new address will be

PC+2+2n. This instruction is a

two-cycle instruction.

Words:

Cycles:

Q Cycle Activity:

Decode

Read literal

'n'

Process

Data

Write to PC

operation

Example:

HERE

BRA

Jump

Before Instruction

address (HERE)

After Instruction

address (Jump)

BSF

Bit Set f

Syntax:

[

label ] BSF

f,b[,a]

Operands:

≤ f ≤ 255

≤ b ≤ 7

∈ [0,1]

Operation:

→ f<b>

Status Affected:

None

Encoding:

1000

bbba

ffff

Description:

Bit 'b' in register 'f' is set. If ‘a’ is 0

Access Bank will be selected, over-

riding the BSR value. If ‘a’ = 1, then

the bank will be selected as per the

BSR value.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write

Example:

BSF

FLAG_REG, 7, 1

Before Instruction

FLAG_REG

0x0A

After Instruction

FLAG_REG

0x8A

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