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AV1832D bảng dữ liệu(PDF) 2 Page - Aplus Intergrated Circuits |
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AV1832D bảng dữ liệu(HTML) 2 Page - Aplus Intergrated Circuits |
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2 / 13 page ![]() AVxx32A Series Rev 1.0 2003/02/12 2 Edege/Level; Hold/UnHold; Retrigger/Irretrigger. □ CPU_INTERFACE mode: Addressing access mode by input pulse count. In this mode, A1~A7 (ROW1~4, COL1~3) are disable, A8 (COL4) can be access up to 32 subtables. (6). The A8 or M16 can be selected as NORMAL, SEQUENTIAL or CPU_INTERFACE. ( Mask option ) □ NORMAL: normal mode as in item (5). □ SEQUENTIAL: can be selected to combine with MODE input or not. ( Mask option ) (A). If A8 or M16 is in SEQUENTIAL and is combined with MODE input: MODE=0 : the device will response by one subtable sequentially and cyclically, from subtable1 to user defined end subtable (subtable n, n=1~16). MODE=1 : the device will response by one subtable sequentially and cyclically, from subtable 17 to user defined end subtable (subtable n, n=17~32). The number of subtables (used in sequence) in MODE=1 and MODE=0 must be equal; this number must be less than 16. (B). If A8 or M16 is in SEQUENTIAL and is not combined with MODE input: The device will response by one subtable sequentially and cyclically, from subtable1 to user defined end subtable (subtable n, n=1~32). The relationship between SEQUENTIAL ( A8/M16 ) and other inputs ( A1~A7 / M1~M15 ) can be selected as RESET or UNRESET. ( Mask option ) ◎ RESET: once the other inputs are triggered, the SEQUENTIAL sequence will reset to subtable 1. ◎ UNRESET: SEQUENTIAL sequence and other inputs are independent. (7). Four STS pins have the following options: ( Mask option ) □ OUT1: Cout (Current output) or STS1 output □ OUT2: PWM1 or STS2 output □ OUT3: PWM2 or STS3 output □ MODE/STS4: MODE selection or STS4 output Cout has 3 current output levels: 1>1.5mA ; 2>3mA ; 3>4.5mA. ( full scale ; Vdd=3V ) PWM1 and PWM2 must be selected on the same time, they can directly drive buzzer or 8, 16, 32 or 64 ohms speaker. |
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