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LM27313XMF bảng dữ liệu(PDF) 2 Page - Texas Instruments

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LM27313XMF bảng dữ liệu(HTML) 2 Page - Texas Instruments

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LM27313
SNVS487D – DECEMBER 2006 – REVISED APRIL 2013
www.ti.com
Connection Diagram
Figure 1. 5-Lead SOT-23 Package – Top View
See Package Number DBV
PIN DESCRIPTIONS
Pin
Name
Function
1
SW
Drain of the internal FET switch.
2
GND
Analog and power ground.
3
FB
Feedback point that connects to external resistive divider to set VOUT.
4
SHDN
Shutdown control input. Connect to VIN if this feature is not used.
5
VIN
Analog and power input.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2)
Storage Temperature Range
−65°C to +150°C
Lead Temp. (Soldering, 5 sec.)
300°C
Power Dissipation(3)
Internally Limited
FB Pin Voltage
−0.4V to +6V
SW Pin Voltage
−0.4V to +30V
Input Supply Voltage
−0.4V to +14.5V
Shutdown Input Voltage
(Survival)
−0.4V to +14.5V
ESD Rating(4)
Human Body Model
±2 kV
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is to be functional, but does not ensure specific limits. For ensured specifications and conditions see the Electrical
Characteristic table.
(2)
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3)
The maximum power dissipation which can be safely dissipated for any application is a function of the maximum junction temperature,
TJ(MAX) = 125°C, the junction-to-ambient thermal resistance for the SOT-23 package, θJ-A = 265°C/W, and the ambient temperature, TA.
The maximum allowable power dissipation at any ambient temperature for designs using this device can be calculated using the
formula:
If power dissipation exceeds the maximum specified above, the internal thermal protection circuitry will protect the device by reducing
the output voltage as required to maintain a safe junction temperature.
(4)
The human body model is a 100 pF capacitor discharged through a 1.5 k
Ω resistor into each pin. Test method is per JESD22-A114.
2
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM27313



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