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LM10 bảng dữ liệu(PDF) 2 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  LM10 Operational Amplifier and Voltage Reference
PDF  34 Pages
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LM10 bảng dữ liệu(HTML) 2 Page - Texas Instruments

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LM10
SNOSBH4D – MAY 1998 – REVISED MARCH 2013
www.ti.com
Figure 3. PDIP Package (P)
Figure 4.
See Package Number P (R-PDIP-T8)
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2) (3)
LM10/LM10B/
LM10BL/
LM10C
LM10CL
Total Supply Voltage
45V
7V
Differential Input Voltage(4)
±40V
±7V
Power Dissipation(5)
internally limited
Output Short-circuit Duration(6)
continuous
Storage-Temp. Range
−55°C to +150°C
Lead Temp. (Soldering, 10 seconds)
TO
300°C
Lead Temp. (Soldering, 10 seconds) DIP
260°C
Vapor Phase (60 seconds)
215°C
Infrared (15 seconds)
220°C
ESD rating is to be determined.
Maximum Junction Temperature
LM10
150°C
LM10B
100°C
LM10C
85°C
(1)
Refer to RETS10X for LM10H military specifications.
(2)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits.
(3)
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(4)
The Input voltage can exceed the supply voltages provided that the voltage from the input to any other terminal does not exceed the
maximum differential input voltage and excess dissipation is accounted for when VIN<V
−.
(5)
The maximum, operating-junction temperature is 150°C for the LM10, 100°C for the LM10B(L) and 85°C for the LM10C(L). At elevated
temperatures, devices must be derated based on package thermal resistance.
(6)
Internal thermal limiting prevents excessive heating that could result in sudden failure, but the IC can be subjected to accelerated stress
with a shorted output and worst-case conditions.
2
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