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PCA9512ADP bảng dữ liệu(PDF) 9 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  Level shifting hot swappable I2C-bus and SMBus bus buffer
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PCA9512ADP bảng dữ liệu(HTML) 9 Page - NXP Semiconductors

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PCA9512A_PCA9512B
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 6 — 1 March 2013
9 of 27
NXP Semiconductors
PCA9512A; PCA9512B
Level shifting hot swappable I2C-bus and SMBus bus buffer
In addition, regardless of the bus capacitance, always choose RPU  65.7 k for
VCC = 5.5 V maximum, RPU  45 k for VCC = 3.6 V maximum. The start-up circuitry
requires logic HIGH voltages on SDAOUT and SCLOUT to connect the backplane to the
card, and these pull-up values are needed to overcome the precharge voltage. See the
curves in Figure 5 and Figure 6 for guidance in resistor pull-up selection.
(1) Unshaded area indicates recommended pull-up, for rise time < 300 ns, with rise time accelerator turned on.
(2) Rise time accelerator off.
Fig 5.
Bus requirements for 3.3 V systems
(1) Unshaded area indicates recommended pull-up, for rise time < 300 ns, with rise time accelerator turned on.
(2) Rise time accelerator off.
Fig 6.
Bus requirements for 5 V systems
Cb (pF)
0
400
300
200
100
002aae782
20
10
30
50
RPU
(k
Ω)
0
Rmax = 45 kΩ
rise time = 20 ns
Rmin = 1 kΩ
rise time = 300 ns(2)
40
(1)
Cb (pF)
0
400
300
200
100
002aae783
70
RPU
(k
Ω)
0
10
20
30
40
50
60
(1)
Rmax = 65.7 kΩ
rise time = 20 ns
Rmin = 1.7 kΩ
rise time = 300 ns(2)



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