74LVC2G00

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2013. All rights reserved.

Product data sheet

Rev. 12 — 8 April 2013

14 of 20

NXP Semiconductors

74LVC2G00

Dual 2-input NAND gate

Fig 15. Package outline SOT902-2 (XQFN8)

References

Outline

version

European

projection

Issue date

IEC

JEDEC

JEITA

SOT902-2

- - -

MO-255

- - -

sot902-2_po

10-11-02

11-03-31

mm

max

nom

min

0.5

0.05

0.00

1.65

1.60

1.55

1.65

1.60

1.55

0.55

0.5

0.15

0.10

0.05

0.1

0.05

A

Dimensions

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

XQFN8: plastic, extremely thin quad flat package; no leads;

8 terminals; body 1.6 x 1.6 x 0.5 mm

SOT902-2

b

0.25

0.20

0.15

DE

e

L

0.35

0.30

0.25

vw

0.05

0.05

0

1

2 mm

scale

terminal 1

index area

B

A

D

E

X

C

y

C

terminal 1

index area

3

L

b

e

A

C

B

v

C

w

2

1

5

6

7

metal area

not for soldering

8

4

A

detail X