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STM32F205RB bảng dữ liệu(PDF) 82 Page - STMicroelectronics

tên linh kiện STM32F205RB
Giải thích chi tiết về linh kiện  ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/1284KB RAM
PDF  163 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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STM32F205RB bảng dữ liệu(HTML) 82 Page - STMicroelectronics

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Electrical characteristics
STM32F205xx, STM32F207xx
82/163
Doc ID 15818 Rev 7
Jitter(4)
Master I2S clock jitter
Cycle to cycle at
12,343 MHz on
48KHz period,
N=432, P=4, R=5
RMS
-
90
-
peak
to
peak
-
±280
-
ps
Average frequency of
12,343 MHz
N=432, P=4, R=5
on 256 samples
TBD
-
TBD
ps
WS I2S clock jitter
Cycle to cycle at 48 KHz
on 1000 samples
-400
-
ps
IDD(PLLI2S)
(5)
PLLI2S power consumption on
VDD
VCO freq = 192 MHz
VCO freq = 432 MHz
0.15
0.45
-
0.40
0.75
mA
IDDA(PLLI2S)
(5)
PLLI2S power consumption on
VDDA
VCO freq = 192 MHz
VCO freq = 432 MHz
0.30
0.55
-
0.40
0.85
mA
1.
TBD stands for “to be defined”.
2.
Take care of using the appropriate division factor M to have the specified PLL input clock values.
3.
Guaranteed by design, not tested in production.
4.
Value given with main PLL running.
5.
Based on characterization, not tested in production.
Table 30.
PLLI2S (audio PLL) characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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