Block diagrams and pins configuration

L9777

6/25

Doc ID 13496 Rev 2

Figure 3.

Block diagram (option B)

Figure 4.

Block diagram (option C)

1.3

Option C features

●

VDD can sustain short to 40 V regardless of VI battery voltage

●

Current capability of VDD scaled down to 50 mA with dropout of 1.5V (Max.)

●

In default condition, VDD and WD functions are disabled using 2 pull down current on

VDD_EN and WD_EN pin

●

Double reset function removed and pin RESET used to detect undervoltage condition

on VDD regulated voltage (VDD_LOW pin)

watchdog

VI

Vbatt

WD

D

TIMING

NMI

WD_EN

GND

VCC

IVCC=200mA

Voltage

Reference

Low

Voltage

Reset

Start up

3R

R

VOFF

+

_

1.26V

RESET

IWD_EN

RADJ

Delay

VDD_EN

VDD

RNMI

RRESET

RWD

IVDD= 50 mA

VMUXTH

10

IVDD_EN

watchdog

VI

Vbatt

WD

D

NMI

WD_EN

GND

VCC

IVCC=200mA

Voltage

Reference

Low

Voltage

Reset

Start up

3R

R

VOFF

+

_

1.26V

VDD_LOW

IWD_EN

RADJ

VDD_EN

VDD

RNMI

RVDD_LOW

RWD

IVDD = 50mA

VMUXTH

10

IVDD_EN

Low

Voltage

Reset

300mV