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AMMCL00XA bảng dữ liệu(PDF) 6 Page - Advanced Micro Devices

tên linh kiện AMMCL00XA
Giải thích chi tiết về linh kiện  2 or 4 Megabyte 3.0 Volt-only Flash Miniature Card
PDF  36 Pages
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nhà sản xuất  AMD [Advanced Micro Devices]
Trang chủ  http://www.amd.com
Logo AMD - Advanced Micro Devices

AMMCL00XA bảng dữ liệu(HTML) 6 Page - Advanced Micro Devices

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AmMCL00XA
PR EL IMIN A R Y
MINIATURE CARD PAD ASSIGNMENTS
A0–A24
Address A0 to A24 are the address bus lines that can
address up to 32 Mwords (64 Mbytes). The address
lines are word addressed. The Miniature Card specifi-
cation does not require the Miniature Card to decode
the upper address lines. A 2 Mbyte Miniature Card that
does not decode the upper address lines would repeat
its address space every 2 Mbytes. Address 0h would
access the same physical location as 200000h,
400000h, 600000h, etc. On the 2 Mbyte cards, A20–
A24 are not connected. On the 4 Mbyte cards,
A21–A24 are not connected.
D0–D15
Data lines D0 through D15 constitute the data bus. The
data bus is composed of two bytes; the low byte is
D0–D7 and the high byte is D8–D15. These lines are
tristated when OE# is high.
OE#
OE# indicates to the card that the current bus cycle is
a read cycle. The output enable access time (tOE) is the
delay from the falling edge of OE# to valid data at the
output pins (assuming the addresses have been stable
for at least tACC – tOE time).
WE#
WE# indicates to the card that the current bus cycle is
a write cycle. The falling edge of WE# (or CE#), which-
ever occurs later, latches address information and the
rising edge of WE# (or CE#), whichever occurs first
latches data/command information.
VS1#
Voltage Sense 1 signal. This signal is grounded.
VS2#
Voltage Sense 2 signal. This signal is left open or not
connected.
CEL#
CEL# enables the low byte of the data bus (D0–D7) on
the card.
CEH#
CEH# enables the high byte of the data bus (D8–D15)
on the card.
RESET#
RESET# controls card initialization. When RESET#
transitions from a low state to a high state, the Minia-
ture Card resets to the Read state after a maximum
delay of 20
µs.
BUSY#
BUSY# is a signal generated by the card to indicate the
status of operations within the Miniature Card. When
BUSY# is high, the Miniature Card is ready to accept
the next command from the host. When BUSY# is low,
the Miniature Card is busy and unable to accept most
data operations from the host. In Flash Miniature Cards
the BUSY# signal is tied to the components’ RY/BY#
signal.
CD#
CD# is a grounded interface signal. After a Miniature
Card has been inserted, CD# will be forced low. The
card detect signal is located in the center of the second
row of interface signals, and should be one of the last
interface signals to connect to the host. Do not confuse
CD# with CINS#.
CINS#
CINS# is a grounded signal on the front of the Miniature
Card that is used for early detection of a card insertion.
CINS# makes contact on the host when the front of the
card is inserted into the socket, before the interface
signals connect.
BS8#
The BS8# (Bus size 8) signal indicates to the Minia-
ture Card that the host has an 8-bit bus. AMD Flash
Miniature Cards ignore this signal (no internal con-
nection). An 8-bit host must connect its D0–D7 data
lines to D8–D15 on the Miniature Card to retrieve the
upper (odd) byte.
GND
Ground
VCC
Vcc is used to supply power to the card.
NC
No connect
RFU
Reserved for future use



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