AMC004DFLKA datasheet(17/46 Pages) AMD

17 / 46 page

AmC0XXDFLKA

two status bits, along with that of D7, is summarized as

follows:

Notes:

1. These status ﬂags apply when outputs are read from a

sector that has been erase-suspended.

2. These status ﬂags apply when outputs are read from the

byte address of the non-erase suspended sector.

Sector Erase Suspend

Sector Erase Suspend command allows the user to in-

terrupt the chip and then do data reads (or program)

from a non-busy sector while it is in the middle of a Sec-

tor Erase operation (which may take up to several sec-

onds). This command is applicable ONLY during the

Sector Erase operation and will be ignored if written

during the Chip Erase or Programming operation. The

Erase Suspend command (B0H) will be allowed only

during the Sector Erase Operation that will include the

sector erase time-out period after the Sector Erase

commands (30H). Writing this command during the

time-out will result in immediate termination of the

time-out period and suspension of the erase operation.

Any other command written during the Erase Sus-

pend mode will be ignored except the Erase Resume

command. Writing the Erase Resume command re-

sumes the erase operation. The addresses are

“don’t-cares” when writing the Erase Suspend or

Erase Resume command.

When the Erase Suspend command is written during

the Sector Erase operation, the device will take a max-

imum of 15

µs to suspend the erase operation. When

the device has entered the erase-suspended mode, the

RY/BY output pin and the D7 bit will be at logic “1”, and

D6 will stop toggling. The user must use the address of

the erasing sector for reading D6 and D7 to determine

if the erase operation has been suspended. Further

writes of the Erase Suspend command are ignored.

When the erase operation has been suspended, the

device defaults to the erase-suspend-read mode.

Reading data in this mode is the same as reading

from the standard read mode except that the data

must be read from sectors that have not been

erase-suspended. Successively reading from the

erase-suspended sector while the device is in the

erase-suspend-read mode will cause D2 to toggle.

(See the section on D2).

After entering the erase-suspend-read mode, the user

can program the device by writing the appropriate com-

mand sequence for Byte Program. This program mode

is known as the erase-suspend-program mode. Again,

programming in this mode is the same as programming

in the regular Byte Program mode except that the data

must be programmed to sectors that are not

erase-suspended. Successively reading from the

erase-suspended sector while the device is in the

erase-suspend-program mode will cause D2 to toggle.

The end of the erase-suspended program operation is

detected by the RY/BY output pin, Data Polling of D7,

or by the Toggle Bit 1 (D6) which is the same as the reg-

ular Byte Program operation. Note that D7 must be

read from the byte program address while D6 can be

read from any address.

Every time a Sector Erase Suspend command followed

by an Erase Resume command is written, the internal

(pulse) counters are reset. These counters are used to

count the number of high voltage pulses the memory

cell requires to program or erase. If the count exceeds

a certain limit, then the D5 bit will be set (Exceeded

Time Limit ﬂag). This resetting of the counters is nec-

essary since the Erase Suspend command can poten-

tially interrupt or disrupt the high voltage pulses.

To resume the operation of Sector Erase, the Resume

command (30H) should be written. Any further writes of

the Resume command at this point will be ignored. An-

other Sector Erase Suspend command can be written

after the chip has resumed erasing.

RESET

Hardware Reset

The D-Series Card may be reset by driving the

RESET pin to VIL. The RESET pin must be kept low

(VIL) for at least 500 ns. Any operation in progress will

be terminated and the internal state machine will be

reset to the read mode 20

µs after the RESET pin is

driven low. If a hardware reset occurs during a pro-

gram operation, the data at that particular location will

be indeterminate.

When the RESET pin is low and the internal reset is

complete, the Card goes to standby mode and cannot

be accessed. Also, note that all the data output pins are

tri-stated for the duration of the RESET pulse. Once the

RESET pin is taken high, the Card requires 500 ns of

wake up time until outputs are valid for read access.

Mode

Program

toggles

Erase

toggles

Erase Suspend Read (Note 1)

(Erase-Suspended Sector)

toggles

Erase Suspend Program

(Note 2)

toggles

(Note 2)

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