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AM79C973VCW bảng dữ liệu(PDF) 203 Page - Advanced Micro Devices

tên linh kiện AM79C973VCW
Giải thích chi tiết về linh kiện  PCnet??FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
PDF  304 Pages
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nhà sản xuất  AMD [Advanced Micro Devices]
Trang chủ  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C973VCW bảng dữ liệu(HTML) 203 Page - Advanced Micro Devices

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Am79C973/Am79C975
203
P R E L I M INARY
Table 53. ANR24: Summary Status Register (Register 24)
Initialization Block
Note: When SSIZE32 (BCR20, bit 8) is set to 0, the
software structures are defined to be 16 bits wide. The
base address of the initialization block must be aligned
to a DWord boundary, i.e., CSR1, bit 1 and 0 must be
cleared to 0. When SSIZE32 is set to 0, the initialization
block looks like Table 54.
Note: The Am79C973/Am79C975 controller performs
DWord accesses to read the initialization block. This
statement is always true, regardless of the setting of
the SSIZE32 bit.
When SSIZE32 (BCR20, bit 8) is set to 1, the software
structures are defined to be 32 bits wide. The base ad-
dress of the initialization block must be aligned to a
DWord boundary, i.e., CSR1, bits 1 and 0 must be
cleared to 0. When SSIZE32 is set to 1, the initialization
block looks like Table 55.
Bit(s)
Name
Description
Read/
Write
H/W or Soft
Reset
15-4
Reserved
Write as 0; Ignore on Read
0
0
3Link Status
1 = Link Status is up.
0 = Link Status is down.
R/O
0
2
Full Duplex
1 = Operating in full duplex mode
0 = Operating in half duplex mode
R/O
0
1
AutoNEG
Alert
1 = AutoNEG status has changed
0 = AutoNEG status unchanged
R/O
0
0
Speed
1 = Operating at 100 Mbps
0 = Operating at 10 Mbps
R/O
1
Table 54. Initialization Block (SSIZE32 = 0)
Address
Bits 15-13
Bit 12
Bits 11-8
Bits 7-4
Bits 3-0
IADR+00h
MODE 15-00
IADR+02h
PADR 15-00
IADR+04h
PADR 31-16
IADR+06h
PADR 47-32
IADR+08h
LADRF 15-00
IADR+0Ah
LADRF 31-16
IADR+0Ch
LADRF 47-32
IADR+0Eh
LADRF 63-48
IADR+10h
RDRA 15-00
IADR+12h
RLEN
0
RES
TDRA 23-16
IADR+14h
TDRA 15-00
IADR+16h
TLEN
0
RES
TDRA 23-16



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