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AM79C873 bảng dữ liệu(PDF) 9 Page - Advanced Micro Devices |
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AM79C873 bảng dữ liệu(HTML) 9 Page - Advanced Micro Devices |
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9 / 44 page ![]() Am79C873 9 PRELIMINARY RX_EN Receive Enable Input This pin is active high enabled for receive signals RXD[3:0], RX_CLK, RX_DV and RX_ER. A low on this input tri-states these output pins. For normal operation in a NODE application, this pin should be pulled high. Media Interface RXI± 100/10 Mbps-TX/T Twisted Pair Differential Input Pair Input These pins are the differential receive input for 10BASE-T and 100BASE-TX. They are capable of re- ceiving 100BASE-TX MLT-3 or 10BASE-T Manchester encoded data. FXRD± 100BASE-FX PECL Differential Input Pair Input These pins are the differential receive input for 100BASE-FX. They are capable of receiving 100BASE-FX. FXSD± 100BASE-FX PECL Signal Detect Input These input signals from the FX-PMD transceiver indi- cate detection of a receive signal from the Fiber Media. 10TXO± 10BASE-T Differential Output Pair Output This output pair provides controlled rise and fall times designed to filter the transmitters output. 100TXO± 100BASE-TX Twisted Pair Differential Output Pair Output This output pair drives MLT-3 encoded data to the 100 M twisted pair cable and provides controlled rise and fall times designed to filter the transmitters output, reducing any associated EMI. FXTD± 100BASE-FX PECL Differential Output PairOutput These pins are the differential transmit output for 100BASE-FX. They are capable of transmitting 100BASE-FX LED Interface These outputs can directly drive LEDs or provide status information to a network management device. FDXLED (POLLED) Polarity/Full Duplex LED Output This pin indicates Full Duplex mode status for 100 Mbps and 10 Mbps operation (Active low). If bit 4 of Register 16 (FDXLED_MODE) is set, the FDXLED pin function will change to indicate the Polarity status for 10 Mbps operation. If polarity is inverted, the POLLED will go ON. COLLED Collision LED Output This pin indicates the presence of collision activity for 10 Mbps and 100 Mbps operation. This LED has no meaning for 10 Mbps or 100 Mbps Full Duplex opera- tion (Active low). LINKLED (TRAFFIC LED) Link LED Output This pin indicates Good Link status for 10 Mbps and 100 Mbps operation (Active low). It functions as the TRAFFIC LED when bit 5 of register 16 is set to 1. In TRAFFIC LED mode, it is always ON when the link is OK. The TRAFFIC LED flashes when transmitting or receiving. RXLED Receive LED Output Drain This pin indicates the presence of receive activity for 10 Mbps and 100 Mbps operation (Active low). The Net- PHY-1 device incorporates a “monostable” function on the RXLED output. This ensures that even minimal re- ceive activity will generate an adequate LED ON time. TXLED Transmit LED Output Drain This pin indicates the presence of transmit activity for 10 Mbps and 100 Mbps operation (Active low). The Net- PHY-1 device incorporates a “monostable” function on the TXLED output. This ensures that even minimal transmit activity will generate an adequate LED ON time. Device Configuration/Control/Status Interface UTP UTP Cable Indication Output This pin is the UTP Cable Indication. When UTP=1, it indicates that the UTP cable is being used. SPEED10 Speed 10 Mbps Output When set high, this bit indicates a 10 Mbps operation, when set low 100 Mbps operation. This pin can drive a low current LED to indicate that 100 Mbps operation is selected. RX_LOCK Lock for Clock/Data Recovery PLL Output When this pin is high, it indicates that the receiver re- covery PLL logic has locked to the input data stream. |
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