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AM7968 bảng dữ liệu(PDF) 35 Page - Advanced Micro Devices

tên linh kiện AM7968
Giải thích chi tiết về linh kiện  TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface)
PDF  127 Pages
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nhà sản xuất  AMD [Advanced Micro Devices]
Trang chủ  http://www.amd.com
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AM7968 bảng dữ liệu(HTML) 35 Page - Advanced Micro Devices

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AMD
31
Am7968/Am7969-175
Am7969-175 TAXIchip Receiver (Notes 13, 14, 22)
t35
n
t35
n
Parameter
No.
Symbol
Parameter Description
Test Conditions
Min
Max
Unit
Bus Interface Signals:
DO0–DO7, DO8/CO3, DO9/CO2, CO0–CO1, DSTRB, CSTRB, IGM, CLK, CNB, VLTN
35
tP
CLK Period (Note 24)
5.7 n
8 n
ns
36
tPD
Data Valid to STRB
↑ Delay
TTL Output Load
ns
37
tPD
CLK
↓ to STRB↑
TTL Output Load
ns
38
tPD
CLK
↑ to STRB↓
TTL Output Load
ns
38a
tPD
STRB
↑ to CLK↑ (Note 23)
TTL Output Load
ns
39
tPD
CLK
↓ to Data Valid Delay
TTL Output Load
ns
40
tPW
STRB Pulse Width HIGH
TTL Output Load
ns
41
tPW
CLK Pulse Width HIGH
TTL Output Load
ns
42
tPW
CLK Pulse Width LOW
TTL Output Load
ns
43
tPD
SERIN to CLK
↓ Delay
TTL Output Load
ns
47A
tS
CNB
↓ to CLK↑ Setup Time
ns
(Note 19)
47B
tS
CNB
↑ to CLK↓ Setup Time
29
ns
48
tH
CNB
↓ to CLK↑ Hold
ns
49
tPW
CNB Pulse Width LOW
ns
Serial Interface Signals: SERIN+, SERIN–
57
tJ
¦
SERIN
± Peak to Peak Input Jitter
2
ns
Tolerance (Note 16)
Miscellaneous Signals: X1 (Note 15)
60
tPW
X1 Pulse Width HIGH
21
ns
61
tPW
X1 Pulse Width LOW
21
ns
2t35
n
2t35
n
+15
t35
n
–5
5t35
2n
5t35
n
–7
5t35
n
–4
t35
2n +17
2t35
n
+26
+
-
23
5t35
n
2t35
n
3t35
n
–10
–31
-
2t35
n
–3
–2



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