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ADP2323ACPZ-R7 bảng dữ liệu(PDF) 8 Page - Analog Devices

tên linh kiện ADP2323ACPZ-R7
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ADP2323ACPZ-R7 bảng dữ liệu(HTML) 8 Page - Analog Devices

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ADP2323
Data Sheet
Rev. A | Page 8 of 32
Pin No.
Mnemonic
Description
23
BST1
Supply Rail for the Gate Drive of Channel 1. Place a 0.1 µF capacitor between SW1 and BST1.
24, 25
SW1
Switch Node for Channel 1.
26, 27
PVIN1
Power Input for Channel 1. This pin is the power input for Channel 1 and provides power for the internal
regulator. Connect to the input power source and connect a bypass capacitor between PVIN1 and ground.
28
EN1
Enable Pin for Channel 1. An external resistor divider can be used to set the turn-on threshold. When not
using the enable pin, connect the EN1 pin to PVIN1.
29
TRK1
Tracking Input for Channel 1. To track a master voltage, drive this pin from a voltage divider from the master
voltage. If the tracking function is not used, connect TRK1 to INTVCC.
30
SS1
Soft Start Control for Channel 1. To program the soft start time, connect a capacitor from SS1 to GND.
31
COMP1
Error Amplifier Output for Channel 1. Connect an RC network from COMP1 to GND. Connect COMP1 and
COMP2 together for a parallel application.
32
FB1
Feedback Voltage Sense Input for Channel 1. Connect to a resistor divider from the Channel 1 output voltage,
V
OUT1.
Exposed Pad
Solder the exposed pad to an external GND plane.



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