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AM28F010A bảng dữ liệu(PDF) 24 Page - Advanced Micro Devices

tên linh kiện AM28F010A
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AM28F010A bảng dữ liệu(HTML) 24 Page - Advanced Micro Devices

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Am28F010A
SWITCHING TEST WAVEFORMS
SWITCHING CHARACTERISTICS over operating range, unless otherwise specified
AC Characteristics—Read-Only Operations
Notes:
1. Guaranteed by design; not tested.
2. Not 100% tested.
Parameter
Symbols
Am28F010A Speed Options
JEDEC
Standard Parameter Description
-70
-90
-120
-150
-200
Unit
tAVAV
tRC
Read Cycle Time (Note 3)
Min
70
90
120
150
200
ns
tELQV
tCE
Chip Enable Access Time
Max
70
90
120
150
200
ns
tAVQV
tACC
Address Access Time
Max
70
90
120
150
200
ns
tGLQV
tOE
Output Enable Access Time
Max
35
35
50
55
55
ns
tELQX
tLZ
Chip Enable to Output in Low Z (Note 3)
Min
0000
0
ns
tEHQZ
tDF
Chip Disable to Output in High Z (Note 1)
Max
20
20
30
35
35
ns
tGLQX
tOLZ
Output Enable to Output in Low Z (Note 3)
Min
0000
0
ns
tGHQZ
tDF
Output Disable to Output in High Z (Note 3)
Max
20
20
30
35
35
ns
tAXQX
tOH
Output Hold Time From First Address, CE
#,
or OE
# change (Note 3)
Min
0000
0
ns
tVCS
VCC Set-up Time to Valid Read (Note 3)
Min
50
50
50
50
50
ns
16778D-17
3 V
0 V
Input
Output
1.5 V
1.5 V
Test Points
AC Testing for -70 devices: Inputs are driven at 3.0 V for a
logic “1” and 0 V for a logic “0”. Input pulse rise and fall times
are
≤10 ns.
2.4 V
0.45 V
Input
Output
Test Points
2.0 V
2.0 V
0.8 V
0.8 V
AC Testing (all speed options except -70): Inputs are driven at
2.4 V for a logic “1” and 0.45 V for a logic “0”. Input pulse rise
and fall times are
≤10 ns.



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