19

www.microsemi.com/soc

SX-A

SX-A Devices

I/Os Per Package

SX-A Device

A54SX08A

A54SX16A

A54SX32A

A54SX72A

Typical Gates

8,000

16,000

32,000

72,000

System Gates

12,000

24,000

48,000

108,000

Logic Modules

768

1,452

2,880

6,036

Combinatorial Cells

512

924

1,800

4,024

Dedicated Flip-Flops

256

528

1,080

2,012

Maximum Flip-Flops

512 *

990

1,980

4,024

Maximum User I/Os

130

180

249

360

Global Clocks

3

3

3

3

Quadrant Clocks

0

0

0

4

BoundaryScanTesting

Yes

Yes

Yes

Yes

3.3V/5VPCI

Yes

Yes

Yes

Yes

Input Set-Up (external)

0 ns

0 ns

0 ns

0 ns

Speed Grades

–F, Std., –1, –2

–F, Std., –1, –2

–F, Std., –1, –2

–F, Std., –1, –2

Temperature Grades

C, I, A, M

C, I, A, M

C, I, A, M, B

C, I, A, M, B

SX-A Devices

A54SX08A

A54SX16A

A54SX32A

A54SX72A

PQ

208

208

208

208

VQ

TQ

100, 144

100, 144

100, 144, 176

BG

329

FG

144

144, 256

144, 256, 484

256, 484

CQ

84, 208, 256

208, 256

Reducingthecostofperformance

The SX-A family of FPGAs offers a cost-effective, single-chip solution for low-power, high-performance designs. SX-A devices can be used to generate system-wide

savings by integrating multiple functions into a single-chip solution. Providing a combination of performance, security, and low power, SX-A FPGAs decrease the

premium for performance while providing a solution that is highly resistant to reverse engineering.

• 12,000to108,000usable

system gates

• 250MHzsystemperformance

• 350MHzinternalperformance

• Hot-swapcompliantI/Os

• Power-upandpower-down

friendly(nosequencingrequired

forsupplyvoltages)

• 66MHz,64-bit3.3V/5.0VPCI

performance(supportingtarget,

master and master/target)

• 2.5V,3.3V,and5.0V

mixed-voltage support

• 100%resourceutilization

with100%pinlocking