công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

MP3388S bảng dữ liệu(PDF) 14 Page - Monolithic Power Systems

tên linh kiện MP3388S
Giải thích chi tiết về linh kiện  50V, 8-String, Step-Up, White LED Driver
PDF  15 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  MPS [Monolithic Power Systems]
Trang chủ  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP3388S bảng dữ liệu(HTML) 14 Page - Monolithic Power Systems

Back Button MP3388S Datasheet HTML 7Page - Monolithic Power Systems MP3388S Datasheet HTML 8Page - Monolithic Power Systems MP3388S Datasheet HTML 9Page - Monolithic Power Systems MP3388S Datasheet HTML 10Page - Monolithic Power Systems MP3388S Datasheet HTML 11Page - Monolithic Power Systems MP3388S Datasheet HTML 12Page - Monolithic Power Systems MP3388S Datasheet HTML 13Page - Monolithic Power Systems MP3388S Datasheet HTML 14Page - Monolithic Power Systems MP3388S Datasheet HTML 15Page - Monolithic Power Systems  
Zoom Inzoom in Zoom Outzoom out
 14 / 15 page
background image
MP3388S—50V, 8-STRING, WHITE LED DRIVERS
MP3388S Rev.1.01
www.MonolithicPower.com
14
10/29/2012
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
Selecting the Output Capacitor
The output capacitor minimizes the output voltage
ripple and ensures a stable feedback loop. The
output capacitor impedance should be low at the
switching frequency. Use ceramic capacitors with
X7R dielectrics for their low ESR characteristics.
The output voltage ripple is estimated as:
IN
LED
OUT
RIPPLE
SW
V
1 -
I
V
V
C2 f



Where VRIPPLE is the output ripple voltage, VIN and
VOUT are the input and output voltages
respectively, ILED is the LED current, fSW is the
switching frequency, and C2 is the output
capacitor.
For most applications, use a 2.2μF ceramic
capacitor.
LAYOUT CONSIDERATIONS
Layout and component placement on the PCB
requires careful attention. Proper high-frequency
switching-path layout can prevent noise and
electromagnetic interference problems. The loop
from SW (U1), to the output diode (D1), to the
output capacitor (C3), to PGND (U1) carries a
high-frequency pulse current: minimize the loop
length and enclosed area (See Figure 10).
Figure 10: Sample Layout
The IC exposed pad is internally connected to
GND pin, and all logic signals are refer to the GND.
Externally connects PGND to GND, and avoid
placing PGND near logic signals.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com