5890 datasheet(3/8 Pages) ALLEGRO

3 / 8 page

5890 AND 5891

8-BIT SERIAL-INPUT,

LATCHED SOURCE DRIVERS

www.allegromicro.com

ELECTRICAL CHARACTERISTICS at T

= +25

°C, V

= 80 V (UCN5890A/LW) or 50 V

(UCN5891A/LW), V

= 5 V and 12 V (unless otherwise noted).

Limits

Characteristic

Symbol

Test Conditions

Min.

Max.

Units

Output Leakage Current

ICEX

Max.

TA = +25°C

—

-50

µA

TA = +70°C

—

-100

µA

Output Saturation Voltage

VCE(SAT)

50 V

IOUT = -100 mA

—

1.8

IOUT = -225 mA

—

1.9

IOUT = -350 mA

—

2.0

Output Sustaining Voltage

VCE(sus)

Max.

IOUT = -350 mA, L = 2 mH, UCN5891A/LW

—

IOUT = -350 mA, L = 2 mH, UCN5890A/LW

—

Input Voltage

VIN(1)

50 V

VDD = 5.0 V

3.5

5.3

VDD = 12 V

10.5

12.3

VIN(0)

50 V

VDD = 5 V to 12 V

-0.3

+0.8

Input Current

IIN(1)

50 V

VDD = VIN = 5.0 V

—

µA

VDD = VIN = 12 V

—

240

µA

Input lmpedance

ZIN

50 V

VDD = 5.0 V

100

—

Ω

VDD = 12 V

—

Ω

Max. Clock Frequency

50 V

3.3*

—

MHz

Serial Data Output

ROUT

50 V

VDD = 5.0 V

—

Ω

Resistance

VDD = 12 V

—

6.0

Ω

Turn-On Delay

tPLH

50 V

Output Enable to Output, IOUT = -350 mA

—

2.0

µs

Turn-Off Delay

tPHL

50 V

Output Enable to Output, IOUT = -350 mA

—

µs

Supply Current

IBB

50 V

All outputs on, All outputs open

—

All outputs off

—

200

µA

lDD

50 V

VDD = 5 V, All outputs off, Inputs = 0 V

—

100

µA

VDD = 12 V, All outputs off, Inputs = 0 V

—

200

µA

VDD = 5 V, One output on, All Inputs = 0 V

—

1.0

VDD = 12 V, One output on, All Inputs = 0 V

—

3.0

Diode Leakage Current

Max.

TA = +25°C

—

µA

TA = +70°C

—

100

µA

Diode Forward Voltage

Open

IF = 350 mA

—

2.0

NOTES: Turn-off delay is influenced by load conditions. Systems applications well below the specified output loading may require

timing considerations for some designs, i.e., multiplexed displays or when used in combination with sink drivers in a totem

pole configuration.

Positive (negative) current is defined as going into (coming out of) the specified device pin.

* Operation at a clock frequency greater than the specified minimum value is possible but not warranteed.

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