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PIC18F2680ISPQTP bảng dữ liệu(PDF) 448 Page - Microchip Technology |
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PIC18F2680ISPQTP bảng dữ liệu(HTML) 448 Page - Microchip Technology |
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448 / 482 page ![]() PIC18F2585/2680/4585/4680 DS39625C-page 446 Preliminary © 2007 Microchip Technology Inc. FIGURE 27-18: MASTER SSP I2C™ BUS START/STOP BITS TIMING WAVEFORMS TABLE 27-20: MASTER SSP I2C™ BUS START/STOP BITS REQUIREMENTS FIGURE 27-19: MASTER SSP I2C™ BUS DATA TIMING Note: Refer to Figure 27-4 for load conditions. 91 93 SCL SDA Start Condition Stop Condition 90 92 Param. No. Symbol Characteristic Min Max Units Conditions 90 TSU:STA Start condition 100 kHz mode 2(TOSC)(BRG + 1) — ns Only relevant for Repeated Start condition Setup Time 400 kHz mode 2(TOSC)(BRG + 1) — 1 MHz mode(1) 2(TOSC)(BRG + 1) — 91 THD:STA Start Condition 100 kHz mode 2(TOSC)(BRG + 1) — ns After this period, the first clock pulse is generated Hold Time 400 kHz mode 2(TOSC)(BRG + 1) — 1 MHz mode(1) 2(TOSC)(BRG + 1) — 92 TSU:STO Stop Condition 100 kHz mode 2(TOSC)(BRG + 1) — ns Setup Time 400 kHz mode 2(TOSC)(BRG + 1) — 1 MHz mode(1) 2(TOSC)(BRG + 1) — 93 THD:STO Stop Condition 100 kHz mode 2(TOSC)(BRG + 1) — ns Hold Time 400 kHz mode 2(TOSC)(BRG + 1) — 1 MHz mode(1) 2(TOSC)(BRG + 1) — Note 1: Maximum pin capacitance = 10 pF for all I2C pins. Note: Refer to Figure 27-4 for load conditions. 90 91 92 100 101 103 106 107 109 109 110 102 SCL SDA In SDA Out |
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