PIC18F2680ISPQTP datasheet(396/482 Pages) MICROCHIP

396 / 482 page

PIC18F2585/2680/4585/4680

DS39625C-page 394

Preliminary

RLNCF

Rotate Left f (No Carry)

Syntax:

RLNCF

f {,d {,a}}

Operands:

≤ f ≤ 255

∈ [0,1]

Operation:

(f<n>)

→ dest<n + 1>,

(f<7>)

→ dest<0>

Status Affected:

N, Z

Encoding:

0100

01da

ffff

Description:

The contents of register ‘f’ are rotated

one bit to the left. If ‘d’ is ‘0’, the result

is placed in W. If ‘d’ is ‘1’, the result is

stored back in register ‘f’ (default).

If ‘a’ is ‘0’, the Access Bank is selected.

If ‘a’ is ‘1’, the BSR is used to select the

GPR bank (default).

If ‘a’ is ‘0’ and the extended instruction

set is enabled, this instruction operates

in Indexed Literal Offset Addressing

mode whenever f

≤ 95 (5Fh). See

Section 25.2.3 “Byte-Oriented and

Bit-Oriented Instructions in Indexed

Literal Offset Mode” for details.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write to

destination

Example:

RLNCF

REG, 1, 0

Before Instruction

REG

1010 1011

After Instruction

REG

0101 0111

RRCF

Rotate Right f through Carry

Syntax:

RRCF

f {,d {,a}}

Operands:

≤ f ≤ 255

∈ [0,1]

Operation:

(f<n>)

→ dest<n – 1>,

(f<0>)

→ C,

(C)

→ dest<7>

Status Affected:

C, N, Z

Encoding:

0011

00da

ffff

Description:

The contents of register ‘f’ are rotated

one bit to the right through the Carry

flag. If ‘d’ is ‘0’, the result is placed in W.

If ‘d’ is ‘1’, the result is placed back in

If ‘a’ is ‘0’, the Access Bank is selected.

If ‘a’ is ‘1’, the BSR is used to select the

GPR bank (default).

If ‘a’ is ‘0’ and the extended instruction

set is enabled, this instruction operates

in Indexed Literal Offset Addressing

mode whenever f

≤ 95 (5Fh). See

Section 25.2.3 “Byte-Oriented and

Bit-Oriented Instructions in Indexed

Literal Offset Mode” for details.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write to

destination

Example:

RRCF

REG, 0, 0

Before Instruction

REG

1110 0110

After Instruction

REG

1110 0110

0111 0011

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