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XRP7708 bảng dữ liệu(PDF) 25 Page - Exar Corporation |
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XRP7708 bảng dữ liệu(HTML) 25 Page - Exar Corporation |
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25 / 28 page ![]() X XR RP P7 77 70 08 8 a an nd d X XR RP P7 77 74 40 0 Q Qu ua ad d C Ch ha an nn neell D Diig giitta all P PW WM M S Stteep p D Do ow wn n C Co on nttrro olllleerrss © 2012 Exar Corporation 25/28 Rev. 1.2.2 I1 is the step load low current Vos is output voltage including the overshoot Vout is the steady state output voltage Or it can be expressed approximately by����=����× (����2−����1)2 2×����������������−∆���� Here, out os V V V − = ∆ is the overshoot voltage deviation. Select ESR such that output voltage ripple (Vrip) specification is met. There are two components in Vrip. First component arises from the charge transferred to and from Cout during each cycle. The second component of Vrip is due to the inductor ripple current flowing through the output capacitor’s ESR. It can be calculated for Vrip: ����������������=����������������×�������������2+� 1 8×����������������×��������� Where: Irip is the inductor ripple current fs is the switching frequency Cout is the output capacitance Note that a smaller inductor results in a higher Irip, therefore requiring a larger Cout and/or lower ESR in order to meet Vrip. • Input Capacitor Selection Select the input capacitor for Voltage, Capacitance, ripple current, ESR and ESL. Voltage rating is nominally selected to be at least twice the input voltage. The RMS value of input capacitor current, assuming a low inductor ripple current, can be approximated as: ������������=����������������×�����×(1−����) Where: Iin is the RMS input current Iout is the DC output current D is the duty cycle In general, the total input voltage ripple should be kept below 1.5% of VIN. The input voltage ripple also has two major components: the voltage drop on the main capacitor Cin V ∆ and the voltage drop due to ESR - ESR V ∆ . The contribution to Input voltage ripple by each term can be calculated from: 2 ) ( in in s out in out out Cin V C f V V V I V − = ∆ ) 5 . 0 ( rip out ESR I I ESR V + ⋅ = ∆ |
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