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AD7708 bảng dữ liệu(PDF) 36 Page - Analog Devices |
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AD7708 bảng dữ liệu(HTML) 36 Page - Analog Devices |
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36 / 44 page ![]() REV. 0 –36– AD7708/AD7718 AD7708/AD7718-to-ADSP-2103/ADSP-2105 Interface Figure 21 shows an interface between the AD7708/AD7718 and the ADSP-2103/ADSP-2105 DSP processor. In the interface shown, the RDY bit of the Status Register is again monitored to determine when the Data Register is updated. The alternative scheme is to use an interrupt-driven system, in which case the RDY output is connected to the IRQ2 input of the ADSP-2103/ ADSP-2105. The serial interface of the ADSP-2103/ADSP-2105 is set up for alternate framing mode. The RFS and TFS pins of the ADSP-2103/ADSP-2105 are configured as active low outputs and the ADSP-2103/ADSP-2105 serial clock line, SCLK, is also configured as an output. The CS for the AD7708/AD7718 is active when either the RFS or TFS outputs from the ADSP-2103/ ADSP-2105 are active. The serial clock rate on the ADSP- 2103/ADSP-2105 should be limited to 3 MHz to ensure correct operation with the AD7708/AD7718. DIN RESET DVDD CS AD7708/ AD7718 SCLK DOUT SCLK DT DR RFS TFS ADSP-2103 / ADSP-2105 Figure 21. AD7708/AD7718-to-ADSP-2103/ADSP-2105 Interface BASIC CONFIGURATION The basic connection diagram for the AD7708/AD7718 in 10- channel mode is shown in Figure 22. This shows both the AVDD and DVDD pins of the converters being driven from the analog 5 V supply. Some applications will have AVDD and DVDD driven from separate supplies. AVDD and DVDD can be operated inde- pendently of each other, allowing the device to be operated with 5 V analog supply and 3 V digital supply or vice versa. The parts can be operated in 8- or 10-channel configurations. In 8-channel mode the user has two reference input options. This allows the user to operate some channels in ratiometric mode and others in absolute measurement mode. In 10-channel mode only one reference option is available. An AD780/REF195, precision 2.5 V reference, provides the reference source for the part. A quartz crystal or ceramic resonator provides the 32.768 kHz master clock source for the part. In some cases, it will be necessary to connect capacitors on the crystal or resonator to ensure that it does not oscillate at overtones of its fundamental operating fre- quency. The values of capacitors will vary, depending on the manufacturer’s specifications. AD780 / REF195 RECEIVE (READ) P1 P2 AIN6 AIN5 AIN4 AIN3 AIN2 AIN1 0.1 F 10 F ANALOG 5V SUPPLY GND VIN VOUT AGND DGND 0.1 F 10 F 0.1 F AVDD DVDD REF1IN(+) REF1IN(–) RESET CS DOUT DIN SCLK MCLKIN MCLKOUT 5V CHIP SELECT SERIAL DATA (WRITE) SERIAL CLOCK 32kHz CRYSTAL ANALOG 5V SUPPLY AD7708/ AD7718 AIN8 AIN7 AIN9 AINCOM AIN10 Figure 22. Basic Configuration for 10-Channel Mode |
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