AD5381BSTZ-5 datasheet(31/40 Pages) AD

31 / 40 page

Data Sheet

AD5381

Rev. D | Page 31 of 40

MICROPROCESSOR INTERFACING

Parallel Interface

The AD5381 can be interfaced to a variety of 16-bit microcon-

trollers or DSP processors. Figure35 shows the AD5381 family

interfaced to a generic16-bit microcontroller/DSP processor.

The lower address lines fromthe processor areconnected to A0

to A5 on the AD5381. The upper address lines aredecoded to

provide a CS, LDACsignal for the AD5381. The fast interface

timing of the AD5381 allows direct interface to a wide variety

of microcontrollersand DSPs, as shown in Figure 35.

AD5381 to MC68HC11

The serial peripheral interface (SPI)on the MC68HC11 is

configured for master mode (MSTR = 1), clock polarity bit

(CPOL)= 0, and the clock phase bit (CPHA)= 1. The SPI is

configured by writing to the SPI control register (SPCR)—see

the MC68HC11 user manual. SCK of the MC68HC11 drives the

SCLK of the AD5381, the MOSIoutput drivesthe serial data

line (D

IN) of the AD5381, and the MISO input is driven from

OUT. The SYNC signal is derived from a port line (PC7).

When data is being transmitted to the AD5381, the SYNC line

is taken low (PC7). Data appearing on the MOSIoutput is valid

on the falling edge of SCK. Serial data from the MC68HC11 is

transmitted in 8-bit bytes with only eight falling clock edges

occurring in the transmit cycle.

MC68HC11

AD5381

MISO

MOSI

SCK

PC7

SDO

RESET

SER/PAR

DIN

SCLK

SYNC

SPI/I2C

DVDD

Figure 34. AD5381-to-MC68HC11 Interface

µCONTROLLER/

DSP PROCESSOR1

AD5381

ADDRESS

DECODE

UPPER BITS OF

ADDRESS BUS

DATA

BUS

D15

R/W

REG1

REG0

D11

LDAC

1ADDITIONAL PINS OMITTED FOR CLARITY.

Figure 35. AD5381-to-Parallel Interface

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