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APL3200 bảng dữ liệu(PDF) 18 Page - Anpec Electronics Coropration |
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APL3200 bảng dữ liệu(HTML) 18 Page - Anpec Electronics Coropration |
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18 / 24 page ![]() Copyright © ANPEC Electronics Corp. Rev. A.5 - Apr., 2009 APL3200 www.anpec.com.tw 18 Applicaiton Information (Cont.) Thermal Consideration (Cont.) PCB Layout Consideration The APL3200 is packaged in a thermally enhanced QFN package. The package includes a thermal pad to provide an effective thermal contact between the device and the printed circuit board. Connecting the exposed pad to a large copper ground plane on the backside of the circuit board through several thermal vias for heatsinking is recommended. Connecting the battery to BATT as close to the device as possible provides accurate battery volt- age sensing. All decoupling capacitors and filter capaci- tors should be placed as close as possible to the device. The high-current charge paths into DC, DCLV, USB, and from the BATT pins must short and wide to minimize volt- age drops. P D=(VDCLV-VBATT) x ICHG_DC (or ICHG_USB) |
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