APW7065C datasheet(13/19 Pages) ANPEC

13 / 19 page

Rev. A.2 - Mar., 2008

APW7065C

www.anpec.com.tw

Application Information (Cont.)

SW is the switching interval

D is the duty cycle

Note that both MOSFETs have conduction loss while the

upper MOSFET, including an additional transition loss.

The switching internal, t

SW, is a function of the reverse

transfer capacitance C

RSS. The (1+TC) term is to factor in

the temperature dependency of the R

DS(ON) and can be

extracted from the “R

DS(ON) vs. Temperature” curve of the

power MOSFET.

PWM Compensation

The output LC filter of a step down converter introduces a

double pole, which contributes with -40dB/decade gain

slope and 180 degrees phase shift in the control loop. A

compensation network among COMP, FB and V

OUT should

be added. The compensation network is shown in Fig-

ure 6. The output LC filter consists of the output inductor

and output capacitors. The transfer function of the LC

filter is given by:

MOSFET Selection (Cont.)

The poles and zero of this transfer functions are:

The F

LC is the double poles of the LC filter, and FESR is the

zero introduced by the ESR of the output capacitor.

Figure 3. The Output LC Filter

The PWM modulator is shown in Figure 5. The input is

the output of the error amplifier and the output is the

PHASE node. The transfer function of the PWM modu-

lator is given by:

Figure 5. The PWM Modulator

Figure 4. The LC Filter GAIN and Frequency

ESR

GAIN

OUT

ESR

PHASE

OUTPUT

OUT

ESR

OSC

PWM

GAIN

∆

The compensation network is shown in Figure 6. It

provides a close loop transfer function with the highest

zero crossover frequency and sufficient phase margin.

The transfer function of error amplifier is given by:

























sC3

R1//

sC2

sC1

GAIN

OUT

COMP

AMP

(

)













































ESR

-40dB/dec

-20dB/dec

Frequency(Hz)

Output of Error

Amplifier

ΔV

OSC

PWM

Comparator

Driver

PHASE

OSC

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