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ADA4891-1ARJZ-R7 bảng dữ liệu(PDF) 14 Page - Analog Devices |
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ADA4891-1ARJZ-R7 bảng dữ liệu(HTML) 14 Page - Analog Devices |
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14 / 20 page ![]() ADA4891-1/ADA4891-2 Rev. A | Page 14 of 20 DRIVING CAPACITIVE LOADS A highly capacitive load reacts with the output impedance of the amplifiers, causing a loss of phase margin and subsequent peaking or even oscillation, as is shown in Figure 45 and Figure 46. Four methods that minimize the output capacitive loading effect include: • Reducing the output resistive load. This pushes the pole further away and, hence, improves the phase margin. • Increase the phase margin with higher noise gains. As the closed-loop gain is increased, the larger phase margin allows for large capacitor loads with less peaking. • Adding a parallel capacitor, CF with RF, from −IN to the output. This adds a zero in the closed-loop frequency response, which tends to cancel out the pole formed by the capacitive load and output impedance of the amplifier. Refer to the Effect of RF on 0.1 dB Gain Flatness section for more details. • Putting a small value resistor, RS, in series with the output to isolate the load capacitor from the output stage of the amplifier. –10 –8 –6 –4 –2 0 2 4 6 8 0.1 1 10 100 FREQUENCY (MHz) VS = 5V VOUT = 200mV p-p G = +1 RL = 1kΩ CL = 6.8pF Figure 45. Closed-Loop Frequency Response, CL = 6.8 pF 50ns/DIV 50mV/DIV VS = 5V G = +1 RL = 1kΩ CL = 6.8pF C1 0 100 –100 Figure 46. 200 mV Step Response, CL = 6.8 pF Figure 47 shows the effect of using a snub resistor (RS) on reducing the peaking in the worst-case frequency response (gain of +1). Using RS = 100 Ω reduces the peaking by 3 dB, with the tradeoff that the closed-loop gain is reduced by 0.9 dB due to attenuation at the output. RS can be adjusted from 0 Ω to 100 Ω to maintain an acceptable level of peaking and closed-loop gain, as shown in Figure 48. Figure 48 shows that the transient response is also much improved by the snub resistor RS = 100 Ω, compared to that of Figure 46. –10 –8 –6 –4 –2 0 2 4 6 8 0.1 1 10 100 FREQUENCY (MHz) VS = 5V VOUT = 200mV p-p G = +1 RL = 1kΩ CL = 6.8pF RS = 0Ω RS = 100Ω 50 Ω RL RS CL VOUT VIN 200mV STEP Figure 47. Capacitive Load Drive vs. Closed-Loop Gain VS = 5V G = +1 RL = 1kΩ CL = 6.8pF RS = 100Ω C1 50ns/DIV 50mV/DIV 0 100 –100 Figure 48. 200 mV Step Response, CL = 50 pF |
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