AD9859

Rev. A | Page 6 of 24

PIN CONFIGURATION

43

42

41

40

39

38

37

48

47

46

45

44

13

15

16

17

18

19

20

21

22

23

24

I/O UPDATE

DVDD

DGND

AVDD

AGND

AVDD

AGND

OSC/REFCLK

OSC/REFCLK

CRYSTAL OUT

CLKMODESELECT

LOOP_FILTER

RESET

PWRDWNCTL

DVDD

DGND

AGND

AGND

AGND

AVDD

AGND

AVDD

AGND

AVDD

AD9859

TOP VIEW

(Not to Scale)

14

1

2

3

4

5

6

7

8

9

10

11

12

36

35

34

33

32

31

30

29

28

27

26

25

Figure 3. 48-Lead TQFP/EP

Note that the exposed paddle on the bottom of the package forms an electrical connection for the DAC and must be attached to

analog ground. Note that Pin 43, DVDD_I/O, can be powered to 1.8 V or 3.3 V; however, the DVDD pins (Pin 2 and Pin 34) can

only be powered to 1.8 V.