ST802RT1A datasheet(6/58 Pages) STMICROELECTRONICS

6 / 58 page

Features

ST802RT1A, ST802RT1B

6/58

Doc ID 17049 Rev 1

Features

1.1

Physical layer

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The ST802RT1x integrates the entire physical layer functions of 100Base-TX, 10Base-

T and 100Base-FX (B version only)

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Optimized deterministic latency for real-time Ethernet operation

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Provides full-duplex operation in both 100 Mbps and 10 Mbps modes

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Provides auto-negotiation (NWAY) function of full/half-duplex operation for both 10 and

100 Mbps

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Provides MLT-3 transceiver with DC restoration for base-line wander compensation

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Provides transmit wave-shaper, receive filters, and adaptive equalizer

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Provides loop-back modes for diagnostics

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Built-in stream cipher scrambler/ de-scrambler and 4B/5B encoder/decoder

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Supports external transformer with a turn ratio of 1.414:1

1.2

LED display

The ST802RT1x supports three configurable light emitting diode (LED) pins. The three

supported LED configurations are: link, speed, activity and collision. Functions are

multiplexed among the LEDs according to the LED mode selected through bit 9 of the

Auxiliary mode 2 register (RN1B[9]). Since these LED pins are also used as strap options,

the polarity of the LED is dependent on whether the pin is pulled up or down.

See Table 26 and paragraph 7.11 for more details of LED mode selection.

1.3

Package

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48-pin LQFP (7 x 7 mm.).

ST802RT1A bảng dữ liệu(PDF) 6 Page - STMicroelectronics