PCF8536AT1 datasheet(35/74 Pages) NXP

35 / 74 page

PCF8536

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Product data sheet

Rev. 2 — 21 February 2012

35 of 74

NXP Semiconductors

PCF8536

Universal LCD low multiplex driver with 6 channel PWM generator

8.9 Display RAM

The display RAM stores the LCD data. Depending on the multiplex drive mode, the

arrangement of the RAM is changed.

• multiplex drive 1:8: RAM is 40  8 bit

• multiplex drive 1:6: RAM is 42  6 bit

• multiplex drive 1:4: RAM is 44  4 bit

Logic 1 in the RAM bit map indicates the on-state (Von(RMS)) of the corresponding LCD

element; similarly, logic 0 indicates the off-state (Voff(RMS)). For more information on

Von(RMS) and Voff(RMS), see Section 8.4.

There is a one-to-one correspondence between

• the bits in the RAM bitmap and the LCD elements,

The display RAM bitmap shows the direct relationship between the display RAM column and the

segment outputs and between the bits in a RAM row and the backplane outputs.

Fig 20. Display RAM bitmap

Display RAM addresses (columns)/segment outputs (S)

013aaa454

BP0

BP1

BP2

BP3

BP4

BP5

BP6

BP7

S0 S1 S2 S3 S4

S35 S36 S37 S38 S39

Multiplex 1:8 drive mode

Multiplex 1:6 drive mode

Multiplex 1:4 drive mode

S0 S1 S2 S3 S4

S35 S36 S37 S38 S39 S40 S41

BP0

BP1

BP2

BP3

BP4

BP5

BP0

BP1

BP2

BP3

S0 S1 S2 S3 S4

S35 S36 S37 S38 S39 S40 S41 S42 S43

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