TLC7524C, TLC7524E, TLC7524I

8BIT MULTIPLYING DIGITALTOANALOG CONVERTERS

SLAS061D − SEPTEMBER 1986 − REVISED JUNE 2007

7

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

+

−

Output

RA = 2 kΩ

(see Note A)

WR

CS

DB0−DB7

Vref

C (see Note B)

RB

VDD

GND

OUT2

OUT1

RFB

NOTES: A. RA and RB used only if gain adjustment is required.

B. C phase compensation (10-15 pF) is required when using high-speed amplifiers to prevent

ringing or oscillation.

Figure 3. Unipolar Operation (2-Quadrant Multiplication)

Output

20 k

Ω

5 k

Ω

10 k

Ω

20 k

Ω

−

+

+

−

RFB

OUT1

OUT2

GND

VDD

RB

C (see Note B)

Vref

DB0−DB7

CS

WR

(see Note A)

RA = 2 kΩ

NOTES: A. RA and RB used only if gain adjustment is required.

B. C phase compensation (10-15 pF) is required when using high-speed amplifiers to prevent ringing or oscillation.

Figure 4. Bipolar Operation (4-Quadrant Operation)

Table 1. Unipolar Binary Code

Table 2. Bipolar (Offset Binary) Code

DIGITAL INPUT

(see Note 3)

ANALOG OUTPUT

DIGITAL INPUT

(see Note 4)

ANALOG OUTPUT

MSB

LSB

ANALOG OUTPUT

MSB

LSB

ANALOG OUTPUT

1 1 1 1 1 1 1 1

−Vref (255/256)

1 1 1 1 1 1 1 1

Vref (127/128)

1 0 0 0 0 0 0 1

−Vref (129/256)

1 0 0 0 0 0 0 1

Vref (1/128)

1 0 0 0 0 0 0 0

−Vref (128/256) = − Vref/2

1 0 0 0 0 0 0 0

0

0 1 1 1 1 1 1 1

−Vref (127/256)

0 1 1 1 1 1 1 1

−Vref (1/128)

0 0 0 0 0 0 0 1

−Vref (1/256)

0 0 0 0 0 0 0 1

−Vref (127/128)

0 0 0 0 0 0 0 0

0

0 0 0 0 0 0 0 0

−Vref

NOTE 3: LSB = 1/256 (Vref)

NOTE 4: LSB = 1/128 (Vref)