PCF2116CUSLASH12 datasheet(48/64 Pages) NXP

48 / 64 page

write data to DDRAM

PH_

DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Ack

Writes ‘H’.

010010001

12 to 15

write data to DDRAM

PHILIPS_

DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Ack

Writes ‘S’.

010100111

(optional I2C stop) I2C start + slave address for write

(as step 8)

PHILIPS_

control byte

PHILIPS_

R/W

Ack

XXXX

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DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Ack

Sets DDRAM address 0 in Address Counter. (also returns

shifted display to original position. DDRAM contents

unchanged). This instruction does not update the Data Register

000000101

PHILIPS

control byte for read

R/W

Ack

DDRAM content will be read from following instructions.

The R/W has to be set to 1 while still in I2C-write mode.

XXXX

PHILIPS

I2C START

PHILIPS

slave address for read

SA6 SA5 SA4 SA3 SA2 SA1 SA0 R/W

Ack

During the acknowledge cycle the content of the DR is loaded

into the internal I2C interface to be shifted out. In the previous

instruction neither a ‘Set address’ nor a ‘Read data’ has been

performed. Therefore the content of the DR was unknown.

011101011

PHILIPS

read data: 8

× SCL + master acknowledge; note 2

DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Ack

× SCL; content loaded into interface during previous

acknowledge cycle is shifted out over SDA. MSB is DB7. During

master acknowledge content of DDRAM address 01 is loaded

into the I2C interface.

XXXXXXXX

PHILIPS

STEP

I2C BYTE

DISPLAY

OPERATION

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