17XSF500 datasheet(13/70 Pages) FREESCALE

13 / 70 page

Analog Integrated Circuit Device Data



Freescale Semiconductor

MC17XSF500

5.3

Block Diagram

The choice of multi-die technology in SOIC exposed pad package including low cost vertical trench FET power die associated

with Smart Power control die lead to an optimized solution.

Figure 6. Functional Block Diagram

5.3.1

Self-protected High Side Switches

OUT1… OUT5 are the output pins of the power switches. The power channels are protected against various kinds of short-

circuits and have active clamp circuitry that may be activated when switching off inductive loads. Many protective and diagnostic

functions are available.

5.3.2

Power Supply

The device operates with supply voltages from 5.5 to 40 V (VPWR), but is full spec. compliant only between 7.0 and 18 V. The

VPWR pin supplies power to the internal regulator, analog, and logic circuit blocks. The VCC pin (5.0 V typ.) supplies the output

register of the Serial Peripheral Interface (SPI). Consequently, the SPI registers cannot be read without presence of VCC. The

employed IC architecture guarantees a low quiescent current in Sleep mode.

5.3.3

MCU Interface and Device Control

In Normal mode the power output channels are controlled by the embedded PWM module, which is configured by the SPI register

settings. For bidirectional SPI communication, VCC has to be in the authorized range. Failure diagnostics and configuration are

also performed through the SPI port. The reported failure types are: open-load, short-circuit to supply, severe short-circuit to

ground, overcurrent, overtemperature, clock-fail, and under and overvoltage.

The device allows driving loads at different frequencies up to 400 Hz.

5.4

Functional Description

The device has four fundamental operating modes: Sleep, Normal, Fail, and Power off. It possesses multiple high side switches

(power channels) each of which can be controlled independently:

•

in Normal mode by SPI interface. For bidirectional SPI communication, a second supply voltage (VCC) is required.

•

in Fail mode by the corresponding the direct inputs IN1… IN4. The OUT5 for the Penta version and the OUT6

are off in this mode.

Power Supply

Gen4 - Functional Block Diagram

Parallel Control Inputs

MCU Interface & Device Control

SPI Interface

Self-protected

Supply

MCU Interface & Output Control

Self-protected High Side Switches

PWM Controller

High Side

Switches

OUT[x]

MCU

Interface

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