10XSC425 datasheet(28/56 Pages) FREESCALE

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Analog Integrated Circuit Device Data



Freescale Semiconductor

10XSC425

Functional Description

5.1

Introduction

The 10XSC425 is one in a family of devices designed for low-voltage lighting applications. Its four low RDS(ON) MOSFETs (dual

10 m

, dual 25 m) can control four separate 55 W / 28 W bulbs and/or Xenon modules.

Programming, control, and diagnostics are accomplished using a 16-bit SPI interface. Its output with selectable slew rate

improves electromagnetic compatibility (EMC) behavior. Additionally, each output has its own parallel input or SPI control for

pulse-width modulation (PWM) control if desired. The 10XSC425 allows the user to program via the SPI the fault current trip

levels and duration of acceptable lamp inrush. The device has Fail-safe mode to provide Fail-safe functionality of the outputs in

case of MCU damaged.

5.2

Functional Pin Description

5.2.1

Output Current Monitoring (CSNS)

The current sense pin provides a current proportional to the designated HS0:HS3 output or a voltage proportional to the

temperature on the GND flag. That current is fed into a ground-referenced resistor (3.3 k

, typical) and its voltage is monitored

by an MCU's A/D. The output type is selected via the SPI. This pin can be tri-stated through the SPI.

5.2.2

Direct Inputs (IN0, IN1, IN2, IN3)

Each IN input wakes the device. The IN0:IN3 high side input pins are also used to directly control HS0:HS3 high side output

pins. If the outputs are controlled by the PWM module, the external PWM clock is applied to the IN0 pin. These pins are to be

driven with CMOS levels, and they have a passive internal pull-down, RDWN.

5.2.3

Fault Status (FSB)

This pin is an open drain configured output requiring an external pull-up resistor to VDD for fault reporting. If a device fault

condition is detected, this pin is active LOW. Specific device diagnostics and faults are reported via the SPI SO pin.

5.2.4

WAKE

The wake input wakes the device. An internal clamp protects this pin from high damaging voltages with a series resistor (10 k



typ). This input has a passive internal pull-down, RDWN.

5.2.5

Reset (RSTB)

The reset input wakes the device. This is used to initialize the device configuration and fault registers, as well as drive the device

into a low-current Sleep mode. The pin also starts the watchdog timer when transitioning from logic [0] to logic [1]. This pin has

a passive internal pull-down, RDWN.

5.2.6

Chip Select (CSB)

The CSB pin enables communication with the master microcontroller (MCU). When this pin is in a logic [0] state, the device is

capable of transferring information to, and receiving information from, the MCU. The 10XSC425 latches in data from the Input

Shift registers to the addressed registers on the rising edge of CSB. The device transfers status information from the power output

to the Shift register on the falling edge of CSB. The SO output driver is enabled when CSB is a logic [0]. CSB should transition

from a logic [1] to a logic [0] state only when SCLK is a logic [0]. CSB has an active internal pull-up from VDD, IUP.

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