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TAS5704PAPRG4 bảng dữ liệu(PDF) 9 Page - Texas Instruments |
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TAS5704PAPRG4 bảng dữ liệu(HTML) 9 Page - Texas Instruments |
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9 / 39 page ![]() TAS5704 www.ti.com SLOS563A – MARCH 2008 – REVISED AUGUST 2010 ELECTRICAL CHARACTERISTICS DC Characteristics, TA = 25°C, PVCC_X, AVCC = 18 V, DVDD = AVDD = 3.3 V, RL = 8 Ω (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOH High-level output voltage 3.3-V TTL and 5-V tolerant (1) IOH = –4 mA 2.4 V VOL Low-level output voltage 3.3-V TTL and 5-V tolerant (1) IOL = 4 mA 0.5 V | VOS | Class-D output offset voltage ±26 mV VBYPASS PVCC/8 reference for analog section No load 2.2 2.26 2.3 V LRCLK, SCLK, SDINx, MCLK, GAIN_x VI = 0 V, DVDD = 3.6 V ±2 VREG_EN, FORMATx, IIL Low-level input current mA CONFIG_x BKND_ERR, RESET, PDN, VI = 0 V, DVDD = 3.6 V ±50 MUTE RESET, PDN, MUTE, GAIN_x, VI = 3.6 V, DVDD = 3.6 V ±2 BKND_ERR VREG_EN, FORMAT_x, IIH High-level input current CONFIGx, LRCLK, SCLK, VI = 3.6 V, DVDD = 3.6 V ±50 mA SDINx, MCLK RESET, PDN, MUTE, LRCLK, VI = 5.5 V, DVDD = 3.6 V ±50 SCLK, SDINx, MCLK, GAIN_x Normal mode 65 80 Power down IDD Digital supply current Supply voltage (DVDD, AVDD) 8 16 mA (PDNZ = LOW) Reset (RESET = LOW) 23 33 ICC Quiescent supply current No load 14 33 57 mA ICC( RESET ) Quiescent supply current in reset mode No load 58 176 mA ICC( PDNZ ) Quiescent supply current in power down mode No load 58 176 mA PSRR DC power-supply rejection ratio PVCC = 17.5 V to 18.5 V 60 dB Drain-source on-state resistance, high-side 240 VCC = 18 V , IO = 500 mA, RDS(on) Low-side 240 m Ω TJ = 25°C Total 480 850 Turnon time (SE mode) (CONFIG_2 = 0) 500 C(BYPASS) = 1 mF, tON ms Turnon time (BTL mode) (CONFIG_2 = 1) 30 Time required for the BYPASS pin to reach its Turnoff time (SE mode) (CONFIG_2 = 0)(2) 500 tOFF ms final value Turnoff time (BTL mode) (CONFIG_2 = 0)(2) 30 (1) 5-V tolerant pins are PDN, RESET, MUTE, SCLK, LRCLK, MCLK, SDIN1, and SDIN2. (2) For pop-free power-off (PVDD = 0 V), it is recommended that PDN be cycled low for at least this period of time before PVDD drops below 10 V and DVDD drops below 3 V. Copyright © 2008–2010, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TAS5704 |
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