AVDD

AVSS

BKND_ERR

VALID

DVDD

CONFIG_2

CONFIG_1

RESET

PLL_FLTM

PLL_FLTP

VR_ANA

PGND_A

DVDD

MCLK

SUB_PWM–

SUB_PWM+

PVCC_D

PVCC_D

PGND_A

OUT_A

PGND_D

PGND_B

PGND_B

PGND_C

OUT_D

PGND_D

PVCC_A

PVCC_A

OUT_B

PGND_C

OUT_A

OUT_D

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

P0071-02

PAP Package

(TopView)

TAS5704

www.ti.com

SLOS563A – MARCH 2008 – REVISED AUGUST 2010

64-PIN, HTQFP PACKAGE

PIN FUNCTIONS

PIN

5-V

TERMINATION

TYPE

DESCRIPTION

TOLERANT

(2)

NAME

NO.

(1)

AGND

57

P

Analog ground for power stage

AVCC

58

P

Analog power supply for power stage. Connect externally to same

potential as PVCC.

AVDD

10

P

3.3-V analog power supply

AVSS

11

P

3.3-V analog supply ground

BKND_ERR

37

DI

Pullup

Active low. A back-end error sequence is initiated by applying a logic

low to this pin. Connect to an external power stage. If no external

power stage is used, connect directly to DVDD.

BST_A

59

P

High-side bootstrap supply for half-bridge A

(1)

TYPE: A = analog; D = 3.3-V digital; P = power/ground/decoupling; I = input; O = output

(2)

All pullups are 20-mA weak pullups and all pulldowns are 20-mA weak pulldowns. The pullups and pulldowns are included to assure

proper input logic levels if the terminals are left unconnected (pullups

→ logic 1 input; pulldowns → logic 0 input). Devices that drive

inputs with pullups must be able to sink 50 mA while maintaining a logic-0 drive level. Devices that drive inputs with pulldowns must be

able to source 50 mA while maintaining a logic-1 drive level.

Copyright © 2008–2010, Texas Instruments Incorporated

Submit Documentation Feedback

5

Product Folder Link(s): TAS5704