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23LC1024-I bảng dữ liệu(PDF) 12 Page - Microchip Technology

tên linh kiện 23LC1024-I
Giải thích chi tiết về linh kiện  1Mbit SPI Serial SRAM with SDI and SQI Interface
PDF  32 Pages
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23LC1024-I bảng dữ liệu(HTML) 12 Page - Microchip Technology

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23A1024/23LC1024
DS25142A-page 12
Preliminary
 2011 Microchip Technology Inc.
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
3.1
Chip Select (CS)
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
When the device is deselected, SO goes to the high-
impedance state, allowing multiple parts to share the
same SPI bus. After power-up, a low level on CS is
required, prior to any sequence being initiated.
3.2
Serial Output (SO)
The SO pin is used to transfer data out of the 23A1024/
23LC1024. During a read cycle, data is shifted out on
this pin after the falling edge of the serial clock.
3.3
Serial Input (SI)
The SI pin is used to transfer data into the device. It
receives instructions, addresses, and data. Data is
latched on the rising edge of the serial clock.
3.4
Serial Dual Interface Pins(SIO0,
SIO1)
The SIO0 and SIO1 pins are used for SDI mode of
operation. Functionality of these I/O pins is shared with
SO and SI.
3.5
Serial Quad Interface Pins (SIO0 –
SIO3)
The SIO0 through SIO3 pins are used for SQI mode of
operation. Because of the shared functionality of these
pins the HOLD feature is not available when using SQI
mode.
3.6
Serial Clock (SCK)
The SCK is used to synchronize the communication
between a master and the 23A1024/23LC1024.
Instructions, addresses or data present on the SI pin
are latched on the rising edge of the clock input, while
data on the SO pin is updated after the falling edge of
the clock input.
3.7
Hold Function (HOLD)
The HOLD pin is used to suspend transmission to the
23A1024/23LC1024 while in the middle of a serial
sequence without having to re-transmit the entire
sequence over again. It must be held high any time
this function is not being used. Once the device is
selected and a serial sequence is underway, the
HOLD pin may be pulled low to pause further serial
communication without resetting the serial sequence.
The HOLD pin should be brought low while SCK is
low, otherwise the HOLD function will not be invoked
until the next SCK high-to-low transition. The
23A1024/23LC1024 must remain selected during this
sequence. The SI and SCK levels are “don’t cares”
during the time the device is paused and any
transitions on these pins will be ignored. To resume
serial communication, HOLD should be brought high
while the SCK pin is low, otherwise serial
communication will not be resumed until the next SCK
high-to-low transition.
The SO line will tri-state immediately upon a high-to
low transition of the HOLD pin, and will begin
outputting again immediately upon a subsequent low-
to-high transition of the HOLD pin, independent of the
state of SCK.
Hold functionality is not available when operating in
SQI mode.
Name
SOIC/
PDIP
TSSOP
Function
CS
1
Chip Select Input
SO/SIO1
2
Serial Data Output/SDI/SQI
Pin
SIO2
3
SQI Pin
VSS
4Ground
SI/SIO0
5
Serial Data Input/SDI/SQI Pin
SCK
6
Serial Clock Input
HOLD/SIO3
7
Hold/SQI Pin
VCC
8
Power Supply



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