PIC16F1503 datasheet(70/340 Pages) MICROCHIP

70 / 340 page

PIC16(L)F1503

DS41607A-page 70

Preliminary

 2011 Microchip Technology Inc.

7.6.5

PIR1 REGISTER

The PIR1 register contains the interrupt flag bits, as

shown in Register 7-5.

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the Global

Interrupt Enable bit, GIE, of the INTCON

appropriate interrupt flag bits are clear prior

to enabling an interrupt.

PIR1: PERIPHERAL INTERRUPT REQUEST REGISTER 1

R/W-0/0

U-0

R/W-0/0

U-0

R/W-0/0

TMR1GIF

ADIF

—

SSP1IF

—

TMR2IF

TMR1IF

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7

TMR1GIF: Timer1 Gate Interrupt Flag bit

1 = Interrupt is pending

0 = Interrupt is not pending

bit 6

ADIF: A/D Converter Interrupt Flag bit

1 = Interrupt is pending

0 = Interrupt is not pending

bit 5-4

Unimplemented: Read as ‘0’

bit 3

SSP1IF: Synchronous Serial Port (MSSP) Interrupt Flag bit

1 = Interrupt is pending

0 = Interrupt is not pending

bit 2

Unimplemented: Read as ‘0’

bit 1

TMR2IF: Timer2 to PR2 Interrupt Flag bit

1 = Interrupt is pending

0 = Interrupt is not pending

bit 0

TMR1IF: Timer1 Overflow Interrupt Flag bit

1 = Interrupt is pending

0 = Interrupt is not pending

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