DSDATA3 datasheet(21/32 Pages) AD

tên linh kiện	DSDATA3

Giải thích chi tiết về linh kiện	4 ADC/8 DAC with PLL, 192 kHz, 24-Bit Codec

PDF	32 Pages

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nhà sản xuất	AD [Analog Devices]

Trang chủ	http://www.analog.com

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21 / 32 page

Data Sheet

AD1939

Rev. E | Page 21 of 32

ALRCLK

ABCLK

4 ADC CHANNELS OF

SECOND IC IN THE CHAIN

4 ADC CHANNELS OF

FIRST IC IN THE CHAIN

ADC L1 ADC R1 ADC L2 ADC R2 ADC L1 ADC R1 ADC L2 ADC R2

ASDATA1 (TDM_OUT

OF THE SECOND AD1939

IN THE CHAIN)

ADC L1 ADC R1 ADC L2 ADC R2

ASDATA2 (TDM_IN

OF THE SECOND AD1939

IN THE CHAIN)

32 BITS

MSB

DSP

SECOND

AD1939

FIRST

AD1939

Figure 22. ADC TDM Daisy-Chain Mode (512 fS ABCLK, Two-AD1939 Daisy Chain)

LRCLK

BCLK

SDATA

LRCLK

BCLK

SDATA

LRCLK

BCLK

SDATA

LSB

LEFT CHANNEL

RIGHT CHANNEL

LEFT CHANNEL

RIGHT CHANNEL

MSB

RIGHT-JUSTIFIED MODE—SELECT NUMBER OF BITS PER CHANNEL

DSP MODE—16 BITS TO 24 BITS PER CHANNEL

I2S-JUSTIFIED MODE—16 BITS TO 24 BITS PER CHANNEL

LEFT-JUSTIFIED MODE—16 BITS TO 24 BITS PER CHANNEL

LRCLK

BCLK

SDATA

LSB

NOTES

1. DSP MODE DOES NOT IDENTIFY CHANNEL.

2. LRCLK NORMALLY OPERATES AT

fS EXCEPT FOR DSP MODE, WHICH IS 2 × fS.

3. BCLK FREQUENCY IS NORMALLY 64 × LRCLK BUT MAY BE OPERATED IN BURST MODE.

MSB

Figure 23. Stereo Serial Modes

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