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AD9912A/PCBZ bảng dữ liệu(PDF) 13 Page - Analog Devices

tên linh kiện AD9912A/PCBZ
Giải thích chi tiết về linh kiện  1 GSPS Direct Digital Synthesizer with 14-Bit DAC
PDF  40 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
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AD9912A/PCBZ bảng dữ liệu(HTML) 13 Page - Analog Devices

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AD9912
Rev. F | Page 13 of 40
100
1k
10k
100k
1M
10M
100M
FREQUENCY OFFSET (Hz)
–100
–110
–120
–130
–140
–150
800MHz
600MHz
RMS JITTER (100Hz TO 100MHz):
600MHz:
800MHz:
585fs
406fs
Figure 15. Absolute Phase Noise Using HSTL Driver,
SYSCLK = 1 GHz Wenzel Oscillator (SYSCLK PLL Bypassed),
HSTL Output Doubler Enabled
100
1k
10k
100k
1M
10M
100M
FREQUENCY OFFSET (Hz)
–110
–120
–130
–140
–150
–160
150MHz
50MHz
10MHz
RMS JITTER (100Hz TO 20MHz):
150MHz:
50MHz:
308fs
737fs
Figure 16. Absolute Phase Noise Using CMOS Driver at 3.3 V,
SYSCLK = 1 GHz Wenzel Oscillator (SYSCLK PLL Bypassed)
DDS Run at 200 MSPS for 10 MHz Plot
100
1k
10k
100k
1M
10M
100M
FREQUENCY OFFSET (Hz)
–110
–120
–130
–140
–150
–160
50MHz
10MHz
RMS JITTER (100Hz TO 20MHz):
50MHz:
790fs
Figure 17. Absolute Phase Noise Using CMOS Driver at 1.8 V,
SYSCLK = 1 GHz Wenzel Oscillator (SYSCLK PLL Bypassed)
250
375
500
625
750
875
1000
SYSTEM CLOCK FREQUENCY (MHz)
800
700
600
500
400
300
200
100
0
TOTAL
3.3V
1.8V
Figure 18. Power Dissipation vs. System Clock Frequency
(SYSCLK PLL Bypassed), fOUT = fSYSCLK/5, HSTL Driver On, CMOS Driver On,
SpurKiller Off
0
100
200
300
400
OUTPUT FREQUENCY (MHz)
800
700
600
500
400
300
200
100
0
TOTAL
3.3V
1.8V
Figure 19. Power Dissipation vs. Output Frequency
SYSCLK = 1 GHz (SYSCLK PLL Bypassed), HSTL Driver On,
CMOS Driver On, SpurKiller Off
0
100
200
300
400
500
FREQUENCY (MHz)
–20
–30
–40
10
0
–10
–50
–60
–70
–80
–90
–100
CARRIER:
SFDR W/O SPURKILLER:
SFDR WITH SPURKILLER:
FREQUENCY SPAN:
RESOLUTION BW:
VIDEO BW:
399MHz
–63.7dBc
–69.3dBc
500MHz
3kHz
30kHz
THESE TWO SPURS
ELIMINATED WITH
SPURKILLER
Figure 20. SFDR Comparison With and Without SpurKiller,
SYSCLK = 1 GHz, fOUT = 400 MHz



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