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HN85C256API10E bảng dữ liệu(PDF) 12 Page - Renesas Technology Corp |
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HN85C256API10E bảng dữ liệu(HTML) 12 Page - Renesas Technology Corp |
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12 / 18 page ![]() HN58C256AI Series R10DS0218EJ0100 Rev.1.00 Page 12 of 16 Oct 07, 2013 Functional Description Automatic Page Write Page-mode write feature allows 1 to 64 bytes of data to be written into the EEPROM in a single write cycle. Following the initial byte cycle, an additional 1 to 63 bytes can be written in the same manner. Each additional byte load cycle must be started within 30 μs from the preceding falling edge of WE or CE. When CE or WE is high for 100 μs after data input, the EEPROM enters write mode automatically and the input data are written into the EEPROM. Data Polling Data polling indicates the status that the EEPROM is in a write cycle or not. If EEPROM is set to read mode during a write cycle, an inversion of the last byte of data outputs from I/O7 to indicate that the EEPROM is performing a write operation. WE, CE Pin Operation During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of WE or CE. Write/Erase Endurance and Data Retention Time The endurance is 10 5 cycles in case of the page programming and 104 cycles in case of the byte programming (1% cumulative failure rate). The data retention time is more than 10 years when a device is page-programmed less than 10 4 cycles. Data Protection To prevent this phenomenon, this device has a noise cancelation function that cuts noise if its width is 20 ns or less. 1. Data Protection against Noise on Control Pins ( CE, OE, WE) during Operation During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. Be careful not to allow noise of a width of more than 20 ns on the control pins. WE CE OE V 0 V V 0 V 20 ns max IH IH |
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