AD9884ASLASHPCB datasheet(4/24 Pages) AD

4 / 24 page

REV. C

AD9884A

–4–

Table I. Package Interconnections

Signal Type

Name

Function

Value

Package Pin

Inputs

RAIN

Analog Input for RED Channel

0.5 V to 1.0 V FS

GAIN

Analog Input for GREEN Channel

0.5 V to 1.0 V FS

BAIN

Analog Input for BLUE Channel

0.5 V to 1.0 V FS

HSYNC

Horizontal Sync Input

3.3 V CMOS

COAST

Clock Generator Coast Input (Optional) 3.3 V CMOS

CLAMP

External Clamp Input (Optional)

3.3 V CMOS

SOGIN

Sync On Green Slicer Input (Optional)

0.5 V to 1.0 V FS

CKEXT

External Clock Input (Optional)

3.3 V CMOS

CKINV

Sampling Clock Inversion (Optional)

3.3 V CMOS

Outputs

DRA7-0

Data Output, Red Channel, Port A

3.3 V CMOS

105–112

DRB7-0

Data Output, Red Channel, Port B

3.3 V CMOS

95–102

DGA7-0

Data Output, Green Channel, Port A

3.3 V CMOS

85–92

DGB7-0

Data Output, Green Channel, Port B

3.3 V CMOS

75–82

DBA7-0

Data Output, Blue Channel, Port A

3.3 V CMOS

65–72

DBB7-0

Data Output, Blue Channel, Port B

3.3 V CMOS

55–62

DATACK

Data Output Clock

3.3 V CMOS

115

DATACK

Data Output Clock Complement

3.3 V CMOS

116

HSOUT

Horizontal Sync Output

3.3 V CMOS

117

SOGOUT

Sync On Green Slicer Output

3.3 V CMOS

118

Control

SDA

Serial Data I/O

3.3 V CMOS

SCL

Serial Interface Clock

3.3 V CMOS

A0, A1

Serial Port Address LSBs

3.3 V CMOS

31, 32

PWRDN

Power-Down Control Input

3.3 V CMOS

125

Analog Interface

REFOUT

Internal Reference Output

1.25 V

126

REFIN

Reference Input

1.25 V

± 10%

127

FILT

External Filter Connection

Power Supply

Main Power Supply

3.3 V

± 10%

4, 8, 10, 11, 16, 18, 19, 23, 25,

124, 128

VDD

Digital Output Power Supply

2.5 V to 3.3 V

± 10% 54, 64, 74, 84, 94, 104, 114, 120

PVD

Clock Generator Power Supply

3.3 V

± 10%

33, 34, 43, 48, 50

GND

Ground

0 V

5, 6, 9, 12, 13, 17, 20, 21, 24, 26,

35, 39, 42, 47, 49, 51, 52, 53, 63,

73, 83, 93, 103, 113, 119, 121,

122, 123

No Connect

1–3, 36–38, 46

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