AD9059SLASHPCB datasheet(4/12 Pages) AD

4 / 12 page

REV. A

–4–

AD9059

NN + 3

N + 5

N + 1

N + 2

N + 4

tPD

tEH tEL

N – 3

N – 2

N – 1

N + 1

N + 2

ENCODE

AIN

DIGITAL

OUTPUTS

APERTURE DELAY

PULSEWIDTH HIGH

PULSEWIDTH LOW

OUTPUT VALID TIME

OUTPUT PROP DELAY

6.7ns

4.0ns

166ns

14.2ns

MIN

TYP

MAX

9.5ns

6.6n

2.7ns

tEH

tEL

tPD

Figure 1. Timing Diagram

PIN CONFIGURATION

TOP VIEW

(Not to Scale)

AD9059

AINA

ENCODE

GND

AINB

VREF

PWRDN

D7B (MSB)

VDD

GND

VDD

D7A (MSB)

D6A

D5A

D4A

D4B

D5B

D6B

D3A

D2A

D1A

D0A (LSB)

D3B

D0B (LSB)

D1B

D2B

PIN FUNCTION DESCRIPTIONS

Pin No.

Mnemonic

Function

1, 28

AINA, AINB

Analog Inputs for ADC A and B.

VREF

Internal Voltage Reference (2.5 V

Typical); Bypass with 0.1

µF to

Ground or Overdrive with External

Voltage Reference.

PWRDN

Power-Down Function Select; Logic

HIGH for Power-Down Mode

(Digital Outputs Go to High-

Impedance State).

4, 25

Analog 5 V Power Supply.

5, 24, 27

GND

Ground.

6, 23

VDD

Digital Output Power Supply.

Nominally 3 V to 5 V.

7–14

D7A–D0A

Digital Outputs of ADC A.

22–15

D7B–D0B

Digital Outputs of ADC B.

ENCODE

Encode Clock for ADCs A and B

(ADCs Sample Simultaneously on

the Rising Edge of ENCODE).

Table I. Digital Coding (VREF = 2.5 V)

Analog Input (V)

Voltage Level

Digital Output

3.0

Positive Full Scale

1111 1111

2.502

Midscale + 1/2 LSB

1000 0000

2.498

Midscale – 1/2 LSB

0111 1111

2.0

Negative Full Scale

0000 0000

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