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MGA-30689 bảng dữ liệu(PDF) 2 Page - AVAGO TECHNOLOGIES LIMITED

tên linh kiện MGA-30689
Giải thích chi tiết về linh kiện  40MHz - 3000MHz Flat Gain High Linearity Gain Block
PDF  16 Pages
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nhà sản xuất  AVAGO [AVAGO TECHNOLOGIES LIMITED]
Trang chủ  http://www.avagotech.com
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MGA-30689 bảng dữ liệu(HTML) 2 Page - AVAGO TECHNOLOGIES LIMITED

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2
80
120
110
100
90
LSL
USL
LSL
USL
13.5
14
14.5
15
15.5
16
16.5
LSL
37
38
39
40
41
42
43
44
45
LSL
21.2
21.6
22
22.4
22.8
23.2
2.8
4
3.8
3.6
3.4
3.2
3
USL
Absolute Maximum Rating [2] TA=25°C
Symbol
Parameter
Units
Absolute Max.
Vdd,max
Device Voltage, RF output to ground
V
5.5
Pin,max
CW RF Input Power
dBm
20
Pdiss
Total Power Dissipation [4]
W
0.75
Tj, max
Junction Temperature
°C
150
TSTG
Storage Temperature
°C
-65 to 150
Thermal Resistance [3]
θjc = 53.5°C/W
(Vdd = 5V, Ids = 100mA, Tc = 85°C)
Notes:
2. Operation of this device in excess
of any of these limits may cause
permanent damage.
3. Thermal resistance measured using
Infrared measurement technique.
4. This is limited by maximum Vdd and
Ids. Derate 18.7 mW/°C for Tc>110°C.
Product Consistency Distribution Charts[5, 6]
Figure 1. Ids, LSL=80mA , nominal=104mA, USL=125mA
Figure 2. Gain, LSL=13.7dB, nominal=14.6dB, USL=16.7dB
Figure 3. OIP3, LSL=37.5dBm, nominal=41.5dBm
Figure 4. P1dB, LSL=21.2dBm, nominal=22.5dBm
Figure 5. NF, nominal=3.23dB, USL=4dB
Notes:
5. Distribution data sample size is 500 samples taken from 3 different
wafer lots and 6 different wafers. Future wafers allocated to this
product may have nominal values anywhere between the upper and
lower limits.
6. Measurements were made on a characterization test board, which
represents a trade-off between optimal OIP3, gain and P1dB. Circuit
trace losses have not been de-embedded from measurements
above.



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