MC68HC908GR4MP datasheet(88/408 Pages) FREESCALE

tên linh kiện	MC68HC908GR4MP

Giải thích chi tiết về linh kiện	M68HC08 Microcontrollers

PDF	408 Pages

Scroll/Zoom	100%

nhà sản xuất	FREESCALE [Freescale Semiconductor, Inc]

Trang chủ	http://www.freescale.com

Logo

88 / 408 page

Analog-to-Digital Converter (ADC)

Technical Data

MC68HC908GR8 — Rev 4.0

Analog-to-Digital Converter (ADC)

MOTOROLA

5.8.3 ADC Clock Register

The ADC clock register (ADCLK) selects the clock frequency for the

ADC.

ADIV2–ADIV0 — ADC Clock Prescaler Bits

ADIV2–ADIV0 form a 3-bit field which selects the divide ratio used by

the ADC to generate the internal ADC clock. Table 5-2 shows the

available clock configurations. The ADC clock should be set to

approximately 1 MHz.

ADICLK — ADC Input Clock Select Bit

ADICLK selects either the bus clock or CGMXCLK as the input clock

source to generate the internal ADC clock. Reset selects CGMXCLK

as the ADC clock source.

Address:

$0003E

Bit 7

654321

Bit 0

Read:

ADIV2

ADIV1

ADIV0

ADICLK

0000

Write:

Reset:

00000000

= Unimplemented

Figure 5-4. ADC Clock Register (ADCLK)

Table 5-2. ADC Clock Divide Ratio

ADIV2

ADIV1

ADIV0

ADC Clock Rate

ADC input clock

÷ 1

ADC input clock

÷ 2

ADC input clock

÷ 4

ADC input clock

÷ 8

ADC input clock

÷ 16

X = don’t care

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

MC68HC908GR4MP bảng dữ liệu(PDF) 88 Page - Freescale Semiconductor, Inc

MC68HC908GR4MP bảng dữ liệu(HTML) 88 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL