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AMC7812B bảng dữ liệu(PDF) 74 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

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AMC7812B
SBAS625A – SEPTEMBER 2013 – REVISED SEPTEMBER 2013
www.ti.com
AUTO-DAC-CLR-SOURCE Register (Read or Write, Address = 53h, Default = 0004h)
This register selects which alarm forces the DAC into a clear state, regardless of which DAC operation mode is
active, auto, or manual.
Table 26. AUTO-DAC-CLR-SOURCE Register
BIT
NAME
DEFAULT
R/W
DESCRIPTION
15
—
0
R
Reserved. Writing to this bit causes no change. Reading this bit returns '0'.
CH0 alarm clear bit.
0 = CH1-ALR goes to '1' and does not force any DAC to a clear status
14
CH0-ALR-CLR
0
R/W
1 = DAC-n is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the CH0-ALR bit in the status register are set ('1')
CH1 alarm clear bit.
0 = CH1-ALR goes to '1' and does not force any DAC to a clear status
13
CH1-ALR-CLR
0
R/W
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the CH1-ALR bit in the status register are set ('1')
CH2 alarm clear bit.
0 = CH2-ALR goes to '1' and does not force any DAC to a clear status
12
CH2-ALR-CLR
0
R/W
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the CH2-ALR bit in the status register are set ('1')
CH3 alarm clear bit.
0 = CH3-ALR goes to '1' and does not force any DAC to a clear status
11
CH3-ALR-CLR
0
R/W
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the CH3-ALR bit in the status register are set ('1')
Local temperature sensor low alarm clear bit.
LT-Low-ALR-
0 = LT-Low-ALR goes to '1' and does not force any DAC to a clear status
10
0
R/W
CLR
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the LT-Low-ALR bit in the status register are set ('1')
Local temperature sensor high alarm clear bit.
LT-High-ALR-
0 = LT-High-ALR goes to '1' and does not force any DAC to a clear status
9
0
R/W
CLR
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the LT-High-ALR bit in the status register are set ('1')
Remote temperature sensor D1 low alarm clear bit.
D1-Low-ALR-
0 = D1-Low-ALR goes to '1' and does not force any DAC to a clear status
8
0
R/W
CLR
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the D1-Low-ALR bit in the status register are set ('1')
Remote temperature sensor D1 high alarm clear bit.
D1-High-ALR-
0 = D1-High-ALR goes to '1' and does not force any DAC to a clear status
7
0
R/W
CLR
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the D1-High-ALR bit in the status register are set ('1')
Remote temperature sensor D2 low alarm clear bit.
D2-Low-ALR-
0 = D2-Low-ALR goes to '1' and does not force any DAC to a clear status
6
0
R/W
CLR
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the D2-Low-ALR bit in the status register are set ('1')
Remote temperature sensor D2 high alarm clear bit.
D2-High-ALR-
0 = D2-High-ALR goes to '1' and does not force any DAC to a clear status
5
0
R/W
CLR
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the D2-High-ALR bit in the status register are set ('1')
D1 fail alarm clear bit.
0 = D1-FAIL-ALR goes to '1' and does not force any DAC to a clear status
4
D1-FAIL-CLR
0
R/W
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the D2-FAIL-ALR bit in the status register are set ('1')
D2 fail alarm clear bit.
0 = D2-FAIL-ALR goes to '1' and does not force any DAC to a clear status
3
D2-FAIL-CLR
0
R/W
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the D2-FAIL-ALR bit in the status register are set ('1')
Thermal alarm clear bit.
THERM-ALR-
0 = THERM-ALR goes to '1' and does not force any DAC to a clear status
2
1
R/W
CLR
1 = DACn is forced to a clear status if both the ACLRn bit in the AUTO-DAC-CLR-EN
register and the THERM-ALR bit in the status register are set ('1')
1
—
0
R
Reserved. Writing to this bit causes no change. Reading this bit returns '0'.
0
—
0
R
Reserved. Writing to this bit causes no change. Reading this bit returns '0'.
74
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