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ADP121 bảng dữ liệu(PDF) 3 Page - Analog Devices

tên linh kiện ADP121
Giải thích chi tiết về linh kiện  Crest Factor, Peak, and RMS RF Power Measurement Circuit Optimized for High Speed, Low Power, and Single 3.3 V Supply
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ADP121 bảng dữ liệu(HTML) 3 Page - Analog Devices

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Circuit Note
CN-0187
Rev. 0| Page 3 of 7
Typical measured performance characteristics of the circuit are
presented in Figure 2 through Figure 5.
0.01
0.1
1
10
–25
–20
–15
–10
–5
0
5
10
15
INPUT (dBm)
450MHz
900MHz
1900MHz
2350MHz
2600MHz
Figure 2. Measured VRMS Output vs. Input Level (Log Scale), 450 MHz,
900 MHz, 1900 MHz, 2350 MHz, 2600 MHz, Supply +3.3 V
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
0.2
0.4
0.6
0.8
1.0
INPUT (V rms)
450MHz
900MHz
1900MHz
2350MHz
2600MHz
Figure 3. Measured VRMS Output vs. Input Level (Linear Scale), 450 MHz,
900 MHz, 1900 MHz, 2350 MHz, 2600 MHz, Supply +3.3 V
0.01
0.1
1
10
–25
–20
–15
–10
–5
0
5
10
15
INPUT (dBm)
450MHz
900MHz
1900MHz
2350MHz
2600MHz
Figure 4. Measured PEAK Output vs. Input Level (Log Scale), 450 MHz,
900 MHz, 1900 MHz, 2350 MHz, 2600 MHz, Supply +3.3 V
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
0.2
0.4
0.6
0.8
1.0
INPUT (V rms)
450MHz
900MHz
1900MHz
2350MHz
2600MHz
Figure 5. Measured PEAK Output vs. Input Level (Linear Scale), 450 MHz,
900 MHz, 1900 MHz, 2350 MHz, 2600 MHz, Supply +3.3 V
The turn-on time and pulse response is strongly influenced by
the size of the square-domain filter (CFLTR) and output shunt
capacitor connected to the VRMS output. Figure 6 (taken from
the ADL5502 data sheet) shows a plot of the output response to
an RF pulse on the RFIN pin, with a 0.1 μF output filter
capacitor and no square-domain filter capacitor (CFLTR). The
falling edge is particularly dependent on the output shunt
capacitance.
1ms/DIV
70mV rms
160mV rms
250mV rms
400mV rms RF INPUT
VRMS
PULSED RFIN
Figure 6. Output Response to Various RF Input Pulse Levels, Supply3 V,
900 MHz Frequency, Square-Domain Filter Open, Output Filter 0.1 μF
To improve the falling edge of the enable and pulse responses,
a resistor can be placed in parallel with the output shunt
capacitor. The added resistance helps to discharge the output
filter capacitor. Although this method reduces the power-off
time, the added load resistor also attenuates the output (see the
Output Drive Capability and Buffering section of the ADL5502
data sheet). Figure 7 (taken from the ADL5502 data sheet)
shows the improvement obtained by adding a parallel 1 kΩ
resistor.



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