LTC1871IMSPBF datasheet(28/36 Pages) LINER

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LTC1871

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APPLICATIONS INFORMATION

The output capacitor in a SEPIC regulator experiences

high RMS ripple currents, as shown in Figure 17. The

RMS output capacitor ripple current is:

IRMS(COUT) =IO(MAX) •

VIN(MIN)

Note that the ripple current ratings from capacitor manu-

facturers are often based on only 2000 hours of life. This

makes it advisable to further derate the capacitor or to

choose a capacitor rated at a higher temperature than

required. Several capacitors may also be placed in parallel

to meet size or height requirements in the design.

Manufacturers such as Nichicon, United Chemicon and

Sanyo should be considered for high performance through-

hole capacitors. The OS-CON semiconductor dielectric

capacitor available from Sanyo has the lowest product of

ESR and size of any aluminum electrolytic, at a somewhat

higher price.

In surface mount applications, multiple capacitors may

have to be placed in parallel in order to meet the ESR or

RMS current handling requirements of the application.

Aluminum electrolytic and dry tantalum capacitors are

both available in surface mount packages. In the case of

tantalum, it is critical that the capacitors have been surge

tested for use in switching power supplies. An excellent

choice is AVX TPS series of surface mount tantalum. Also,

ceramic capacitors are now available with extremely low

ESR, ESL and high ripple current ratings.

SEPIC Converter: Input Capacitor Selection

The input capacitor of a SEPIC converter is less critical

than the output capacitor due to the fact that an inductor

is in series with the input and the input current waveform

is triangular in shape. The input voltage source impedance

determines the size of the input capacitor which is typi-

cally in the range of 10μF to 100μF. A low ESR capacitor

is recommended, although it is not as critical as for the

output capacitor.

The RMS input capacitor ripple current for a SEPIC con-

verter is:

IRMS(CIN) =

• IL

Please note that the input capacitor can see a very high

surge current when a battery is suddenly connected to

the input of the converter and solid tantalum capacitors

can fail catastrophically under these conditions. Be sure

to specify surge-tested capacitors!

SEPIC Converter: Selecting the DC Coupling Capacitor

The coupling capacitor C1 in Figure 16 sees nearly a rectan-

gular current waveform as shown in Figure 17. During the

switch off-time the current through C1 is IO(VO/VIN) while

approximately – IO ﬂows during the on-time. This current

waveform creates a triangular ripple voltage on C1:

VC1(P P) =

IO(MAX)

C1• f

•

VIN + VO + VD

The maximum voltage on C1 is then:

VC1(MAX) = VIN +

VC1(P P)

which is typically close to VIN(MAX). The ripple current

through C1 is:

IRMS(C1) =IO(MAX) •

VO + VD

VIN(MIN)

The value chosen for the DC coupling capacitor normally

starts with the minimum value that will satisfy 1) the RMS

current requirement and 2) the peak voltage requirement

(typically close to VIN). Low ESR ceramic and tantalum

capacitors work well here.

SEPIC Converter Design Example

The design example given here will be for the circuit shown

in Figure 18. The input voltage is 5V to 15V and the output

is 12V at a maximum load current of 1.5A (2A peak).

1. The duty cycle range is:

VO + VD

VIN + VO + VD

= 45.5% to 71.4%

2. The operating mode chosen is pulse skipping, so the

MODE/SYNC pin is shorted to INTVCC.

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