LPC81XM_13 datasheet(53/71 Pages) NXP

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LPC81xM

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Product data sheet

Rev. 3 — 29 July 2013

53 of 71

NXP Semiconductors

LPC81xM

32-bit ARM Cortex-M0+ microcontroller

13. Analog characteristics

13.1 BOD

[1]

Interrupt levels are selected by writing the level value to the BOD control register BODCTRL.

[2]

Typical ratings are not guaranteed. The values listed are for room temperature (25

C), V

DD = 3.3 V, typical

samples.

13.2 Internal voltage reference

[1]

Characterized through simulation.

[2]

Characterized on a typical silicon sample.

Table 19.

BOD static characteristics[1]

Tamb =-40 C to +105 C.

Symbol

Parameter

Conditions

Typ[2]

Unit

Vth

threshold voltage

interrupt level 1

assertion

2.3

de-assertion

2.4

interrupt level 2

assertion

2.6

de-assertion

2.7

interrupt level 3

assertion

2.8

de-assertion

2.9

reset level 1

assertion

2.1

de-assertion

2.2

reset level 2

assertion

2.4

de-assertion

2.5

reset level 3

assertion

2.6

de-assertion

2.8

Table 20.

Internal voltage reference static and dynamic characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

output voltage

Tamb = 40 C to +105 C

[1] 0.855

0.900

0.945

Tamb = 70 C to 105 C

[2] -0.906

Tamb = 50 C

[2] -0.905

Tamb = 25 C

[4] 0.893

0.903

0.913

Tamb = 0 C

[2] -0.902

Tamb = 20 C

[2] -0.899

Tamb = 40 C

[2] -0.896

ts(pu)

power-up

settling time

to 99% of VO

[3] -

155

195

s

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